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authorSumeet Pawnikar <sumeet.r.pawnikar@intel.com>2019-07-23 22:32:17 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-07-31 04:28:04 +0000
commit17674ad8293dcffbbfb117751e0830e439202818 (patch)
tree218a8a444905792ca133cade66c69f8e2a2c2ad5 /util/superiotool
parent810527a4eacedfb4d63dd90d413be53c9119d024 (diff)
downloadcoreboot-17674ad8293dcffbbfb117751e0830e439202818.tar.xz
mb/google/hatch/variants/hatch: Set PCH Thermal Threshold value to 77 deg C
PMC logic shuts down the PCH thermal sensor when CPU is in a C-state and DTS Temp <= Low Temp Threshold (LTT) in case of Dynamic Thermal Shutdown when S0ix is enabled. BUG=133345634 BRANCH=None TEST=Verified Thermal Device (B0: D20: F2) TSPM offset 0x1c [LTT (8:0)] value is 0xFE on Hatch. Change-Id: Ib20fae04080b28c6105e5a187cc5d7a55b48d709 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33147 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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