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authorDuncan Laurie <dlaurie@chromium.org>2015-11-22 14:53:57 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-12-03 14:17:51 +0100
commitfb509830085e379cee8eb9b5f619c34c249c9d77 (patch)
tree6ef8091fb064c4485267082995ac858ee28cc477 /util/viatool
parent590ac64d5571d8b85e0ddd65b25b8cda9354de15 (diff)
downloadcoreboot-fb509830085e379cee8eb9b5f619c34c249c9d77.tar.xz
intel/fsp: Add post codes for FSP phases
Add post codes for the various FSP phases and use them as appropriate in FSP 1.0 and 1.1 implementations. This will make it more consistent to debug FSP hangs and resets. BUG=chrome-os-partner:40635 BRANCH=none TEST=build and boot on glados and chell Change-Id: I32f8dde80a0c6c117fe0fa48cdfe2f9a83b9dbdf Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3b616ff3c9d8b6d05c8bfe7f456f5c189e523547 Original-Change-Id: I081745dcc45b3e9e066ade2227e675801d6f669a Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/313822 Original-Commit-Ready: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12595 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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