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| author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2007-12-02 19:03:23 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2007-12-02 19:03:23 +0000 |
| commit | d795b9a9ec0744b241df5147efd6afbac4e1b64e (patch) | |
| tree | 71f0dfad6ed6f090850423aa02adf2a02fbfbb8e /util | |
| parent | 9da69f83d9fd3b872afb38c24b373b0807c76b00 (diff) | |
| download | coreboot-d795b9a9ec0744b241df5147efd6afbac4e1b64e.tar.xz | |
Add board-enable for Acorp 6A815EPD.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2995 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util')
| -rw-r--r-- | util/flashrom/README | 1 | ||||
| -rw-r--r-- | util/flashrom/board_enable.c | 28 |
2 files changed, 29 insertions, 0 deletions
diff --git a/util/flashrom/README b/util/flashrom/README index 7be37c74c7..9f842ff508 100644 --- a/util/flashrom/README +++ b/util/flashrom/README @@ -58,6 +58,7 @@ no LinuxBIOS table is found: * GIGABYTE GA-M57SLI-S4 v2.0: use -m gigabyte:m57sli * GIGABYTE GA-M61P-S3: use -m gigabyte:m61p * MSI K8N Neo3: use -m msi:k8n-neo3 +* Acorp 6A815EPD: use -m acorp:6a815epd ROM Layout Support diff --git a/util/flashrom/board_enable.c b/util/flashrom/board_enable.c index 78749634ae..13c4f1f5e3 100644 --- a/util/flashrom/board_enable.c +++ b/util/flashrom/board_enable.c @@ -323,6 +323,32 @@ static int board_epox_ep_bx3(const char *name) } /** + * Suited for Acorp 6A815EPD + */ +static int board_acorp_6a815epd(const char *name) +{ + struct pci_dev *dev; + uint16_t port; + uint8_t val; + + dev = pci_dev_find(0x8086, 0x2440); /* Intel ICH2 LPC */ + if (!dev) { + fprintf(stderr, "\nERROR: ICH2 LPC bridge not found.\n"); + return -1; + } + + /* Use GPIOBASE register to find where the GPIO is mapped. */ + port = (pci_read_word(dev, 0x58) & 0xFF80) + 0xE; + + val = inb(port); + val |= 0x80; /* Top Block Lock -- pin 8 of PLCC32 */ + val |= 0x40; /* Lower Blocks Lock -- pin 7 of PLCC32 */ + outb(val, port); + + return 0; +} + +/** * We use 2 sets of IDs here, you're free to choose which is which. This * is to provide a very high degree of certainty when matching a board on * the basis of subsystem/card IDs. As not every vendor handles @@ -376,6 +402,8 @@ struct board_pciid_enable board_pciid_enables[] = { "ibm", "x3455", "IBM x3455", board_ibm_x3455}, {0x8086, 0x7110, 0x0000, 0x0000, 0x8086, 0x7190, 0x0000, 0x0000, "epox", "ep-bx3", "EPoX EP-BX3", board_epox_ep_bx3}, + {0x8086, 0x1130, 0x0000, 0x0000, 0x105a, 0x0d30, 0x105a, 0x4d33, + "acorp", "6a815epd", "Acorp 6A815EPD", board_acorp_6a815epd}, {0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL} /* Keep this */ }; |