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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-07-15 18:04:23 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2019-07-19 15:06:23 +0000 |
| commit | b30a47b841f1c7d55d9cf207e1cc89f1b7f7fa51 (patch) | |
| tree | 26768bd5cafaf5615c4e2e80cee0835308d882d2 /util | |
| parent | fa0ef81d155a913b857055c6ce81e628ff866742 (diff) | |
| download | coreboot-b30a47b841f1c7d55d9cf207e1cc89f1b7f7fa51.tar.xz | |
sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supported
The processor P_BLK doesn't support throttling. This behaviour could be
emulated with SMM, but instead just update the FADT to indicate no support
for legacy I/O based throttling using P_CNT.
We have _PTC defined in SSDT, which should be used in favour of P_CNT by
ACPI aware OS, so this change has no effect on modern OS.
Drop all occurences of p_cnt_throttling_supported and update autoport
to not generate it any more.
Change-Id: Iaf82518d5114d6de7cef01dca2d3087eea8ff927
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34351
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'util')
| -rw-r--r-- | util/autoport/bd82x6x.go | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go index 141ec5c7ae..fbe0c3a03e 100644 --- a/util/autoport/bd82x6x.go +++ b/util/autoport/bd82x6x.go @@ -233,7 +233,6 @@ func (b bd82x6x) Scan(ctx Context, addr PCIDevData) { "sata_port_map": fmt.Sprintf("0x%x", PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 2}].ConfigDump[0x92]&0x3f), - "p_cnt_throttling_supported": (FormatBool(FADT[104] == 1 && FADT[105] == 3)), "c2_latency": FormatHexLE16(FADT[96:98]), "docking_supported": (FormatBool((FADT[113] & (1 << 1)) != 0)), "spi_uvscc": fmt.Sprintf("0x%x", inteltool.RCBA[0x38c8]), |