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| author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2020-01-10 13:23:02 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-14 10:02:24 +0000 |
| commit | 3e4f7a39f8cbdfc7cd097b5c57c43f52d9b0fb4c (patch) | |
| tree | e11bf81aa69d5efb6afd1f4ce3c0b098f6cf47bb /util | |
| parent | dd662870dd9da0be937c593b0b62f3b5c8030cf7 (diff) | |
| download | coreboot-3e4f7a39f8cbdfc7cd097b5c57c43f52d9b0fb4c.tar.xz | |
mainboard: add Supermicro X9SCL/X9SCM
Boots to Linux.
Works:
- CPU (Core i3-2120 tested)
- Memory (one 1GB 1Rx8 PC3-10600E module tested)
- Slots 4, 6, 7
To fix/improve:
- SuperIO hardware monitor setup for PECI and fan control
- SuperIO ASL in DSDT (e.g. UART Devices)
- PEG PCIe lanes (should show x8 max width instead of x16 on 0:1.0 for Slot 7)
Untested:
- IPMI where BMC is fully implemented (X9SC[LM](+)-F variants)
- GbE on X9SCL+-F (where there are two 82574L instead of one)
- Slot 5 (x4 on 0:06.0) (only applicable to X9SCM variants)
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Change-Id: I985db89d67de21bbafbdc34d7044496434a6eb17
Depends-On: I5b7599746195cfa996a48320404a8dbe6820483a, I1206746332c9939a78b67e7b48d3098bdef8a2ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38346
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util')
0 files changed, 0 insertions, 0 deletions