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author | Sven Schnelle <svens@stackframe.org> | 2009-01-07 12:11:13 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-01-07 12:11:13 +0000 |
commit | c84ce73ab80728fef196efd7a7e44e1a271f363f (patch) | |
tree | a8016e3ed448a75cc34abe4705e4cfe38626de05 /util | |
parent | 505aaf56e21b94e52cfdeb16b765163f7604e1aa (diff) | |
download | coreboot-c84ce73ab80728fef196efd7a7e44e1a271f363f.tar.xz |
Add i631x LPC support.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3848 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util')
-rw-r--r-- | util/flashrom/chipset_enable.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c index 00959ea5ad..4a3c9c7d80 100644 --- a/util/flashrom/chipset_enable.c +++ b/util/flashrom/chipset_enable.c @@ -880,6 +880,7 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x24cc, "Intel ICH4-M", enable_flash_ich_4e}, {0x8086, 0x24d0, "Intel ICH5/ICH5R", enable_flash_ich_4e}, {0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e}, + {0x8086, 0x2670, "Intel 631xESB/632xESB/3100", enable_flash_ich_dc}, {0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc}, {0x8086, 0x5031, "Intel EP80579", enable_flash_ich7}, |