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authorUwe Hermann <uwe@hermann-uwe.de>2007-09-01 19:42:42 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-09-01 19:42:42 +0000
commitbd26392f42e508bf67503b0d44577528a3998bc0 (patch)
treef06b218bbd62ff5c9d7641fe9ece4a97bc2181e5 /util
parent8a5a264748d8cea46040646222da904d5930e002 (diff)
downloadcoreboot-bd26392f42e508bf67503b0d44577528a3998bc0.tar.xz
Add support for the ITE IT8708F.
Here's a dump from my test system which has an IT8708F: No SuperI/O chip found at 0x002e probing 0x002e, failed (0x87), data returns 0x87 SuperI/O found at 0x2e: id=0x8708, chipver=0x0 ITE IT8708 idx 07 20 21 22 23 24 25 26 27 28 29 2a 2e 2f val 02 87 08 00 00 00 00 00 03 01 01 00 00 00 def NA 87 08 00 00 NA 3f 00 ff ff ff ff 00 00 switching to LDN 0x0 idx 30 60 61 70 74 f0 f1 val 01 03 f0 06 02 00 80 def 00 03 f0 06 02 00 00 switching to LDN 0x1 idx 30 60 61 70 f0 val 01 03 f8 04 00 def 00 03 f8 04 00 switching to LDN 0x2 idx 30 60 61 70 f0 f1 f2 f3 val 01 02 f8 03 00 50 01 7f def 00 02 f8 03 00 50 00 7f switching to LDN 0x3 idx 30 60 61 62 63 64 65 70 74 f0 val 01 03 78 07 78 00 80 07 03 0b def 00 03 78 07 78 00 80 07 03 03 switching to LDN 0x4 idx e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f2 f3 f4 f5 f6 val 80 61 00 00 00 00 00 00 80 00 30 00 80 00 de def NA NA 00 00 00 00 00 00 00 00 00 00 00 NA NA switching to LDN 0x5 idx 30 60 61 62 63 70 71 f0 val 01 00 60 00 64 01 02 0c def 01 00 60 00 64 01 02 00 switching to LDN 0x6 idx 30 70 71 f0 val 01 0c 02 00 def 00 0c 02 00 switching to LDN 0x7 idx 70 b0 b1 b2 b3 b4 b5 b8 b9 ba bb bc bd c0 c1 c2 c3 c4 c5 c8 c9 ca cb cc cd d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc val 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 01 01 00 00 00 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 7f 20 51 00 0e 00 00 00 00 00 00 00 def 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NA NA NA NA NA NA 00 00 00 00 00 00 00 00 00 00 00 NA 00 switching to LDN 0x8 idx 30 60 61 val 00 02 01 def 00 02 01 switching to LDN 0x9 idx 30 60 61 70 f0 val 00 03 10 0b 06 def 00 03 10 0b 00 switching to LDN 0xa idx 30 60 61 70 f0 val 00 03 00 0a 40 def 00 03 00 0a 00 No SuperI/O chip found at 0x004e No SuperIO chip found at 0x004e No SuperIO chip found at 0x004e Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2757 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util')
-rw-r--r--util/probe_superio/probe_superio.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/util/probe_superio/probe_superio.c b/util/probe_superio/probe_superio.c
index c7c7ef4dfa..aeaf330332 100644
--- a/util/probe_superio/probe_superio.c
+++ b/util/probe_superio/probe_superio.c
@@ -4,6 +4,7 @@
* Copyright (C) 2006 Ronald Minnich <rminnich@gmail.com>
* Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
* Copyright (C) 2007 Carl-Daniel Hailfinger
+ * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -159,6 +160,60 @@ const static struct ite_registers {
{EOT}}},
{0x8705, "IT8705 or IT8700", {
{EOT}}},
+ {0x8708, "IT8708", {
+ {NOLDN,
+ {0x07,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
+ 0x29,0x2a,0x2e,0x2f,EOT},
+ {NANA,0x87,0x08,0x00,0x00,NANA,0x3f,0x00,0xff,0xff,
+ 0xff,0xff,0x00,0x00,EOT}},
+ {0x0,
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
+ {0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
+ {0x1,
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x00,0x03,0xf8,0x04,0x00,EOT}},
+ {0x2,
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
+ {0x00,0x02,0xf8,0x03,0x00,0x50,0x00,0x7f,EOT}},
+ {0x3,
+ {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0x74,
+ 0xf0,EOT},
+ {0x00,0x03,0x78,0x07,0x78,0x00,0x80,0x07,0x03,
+ 0x03,EOT}},
+ {0x4,
+ {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,
+ 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
+ {NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,NANA,NANA,EOT}},
+ {0x5, /* Note: 0x30 can actually be 0x00 _or_ 0x01. */
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
+ {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}},
+ {0x6,
+ {0x30,0x70,0x71,0xf0,EOT},
+ {0x00,0x0c,0x02,0x00,EOT}},
+ {0x7,
+ {0x70,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,
+ 0xbb,0xbc,0xbd,0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc8,
+ 0xc9,0xca,0xcb,0xcc,0xcd,0xd0,0xd1,0xd2,0xd3,0xd4,
+ 0xd5,0xd6,0xd7,0xd8,0xd9,0xda,0xdb,0xdc,0xf0,0xf1,
+ 0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,
+ 0xfc,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,
+ 0x00,EOT}},
+ {0x8,
+ {0x30,0x60,0x61,EOT},
+ {0x00,0x02,0x01,EOT}},
+ {0x9,
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x00,0x03,0x10,0x0b,0x00,EOT}},
+ {0xa,
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x00,0x03,0x00,0x0a,0x00,EOT}},
+ {EOT}}},
{0x8710, "IT8710", {
{EOT}}},
{0x8712, "IT8712", {
@@ -241,6 +296,7 @@ dump_ite(unsigned short port, unsigned short id)
switch(id) {
case 0x8702:
case 0x8705:
+ case 0x8708:
case 0x8710:
case 0x8712:
case 0x8716:
@@ -393,6 +449,7 @@ probe_idregs_ite(unsigned short port){
/* Enable configuration sequence (ITE uses this for newer IT87[012]x)
IT871[01] uses 0x87, 0x87 -> fintek detection should handle it
+ IT8708 uses 0x87, 0x87 -> fintek detection should handle it
IT8761 uses 0x87, 0x61, 0x55, 0x55/0xaa
IT86xx series uses different ports
IT8661 uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes
@@ -429,6 +486,7 @@ probe_idregs_ite(unsigned short port){
unknown -> IT8722 (no datasheet)
0x8702 -> IT8702
0x8705 -> IT8700 or IT8705
+ 0x8708 -> IT8708
0x8710 -> IT8710
0x8712 -> IT8712
0x8716 -> IT8716
@@ -441,6 +499,7 @@ probe_idregs_ite(unsigned short port){
switch(id) {
case 0x8702:
case 0x8705:
+ case 0x8708:
case 0x8712:
case 0x8716:
case 0x8718: