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authorDave Frodin <dave.frodin@se-eng.com>2015-03-13 08:22:17 -0600
committerDave Frodin <dave.frodin@se-eng.com>2015-03-17 17:49:58 +0100
commitf364fc7682e6ac68e1614e759a3cdeed46dd9e5b (patch)
treea949d6937f2722ee50c499b52552eed96d004ec8 /util
parent68ec2fce2bcf0f9d8f02d80feb4d6bc4385e9047 (diff)
downloadcoreboot-f364fc7682e6ac68e1614e759a3cdeed46dd9e5b.tar.xz
southbridge/amd/pi: Enable early I/O decode to LPC
The decode of UART addresses down to the LPC bus needs to occur early to allow romstage console messages to be seen. This enables the decode of most of the I/O ports typically seen in a system. Change-Id: I6636946af4ad5320a5a46c2920b4f06345b5f806 Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/8661 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
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