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authorCorey Osgood <corey.osgood@gmail.com>2010-08-17 08:33:44 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-17 08:33:44 +0000
commitf366ce05ef3eb95c6c9d84a97cde1a4026f22787 (patch)
tree87733a7ba137fc9713fb96c2655ff6eef1a21e6f /util
parente7b7ae23e688fb883003aed42f614bcfa977894e (diff)
downloadcoreboot-f366ce05ef3eb95c6c9d84a97cde1a4026f22787.tar.xz
Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.
Both are tested and appear to be working, however I'm not 100% clear on if the NM10 has any other PCI IDs. Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util')
-rw-r--r--util/inteltool/gpio.c2
-rw-r--r--util/inteltool/inteltool.c2
-rw-r--r--util/inteltool/inteltool.h2
-rw-r--r--util/inteltool/powermgt.c2
-rw-r--r--util/inteltool/rootcmplx.c2
5 files changed, 10 insertions, 0 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c
index a3b6e3d4a0..75658a9782 100644
--- a/util/inteltool/gpio.c
+++ b/util/inteltool/gpio.c
@@ -171,6 +171,7 @@ int print_gpios(struct pci_dev *sb)
gpio_registers = ich9_gpio_registers;
size = ARRAY_SIZE(ich9_gpio_registers);
break;
+ case PCI_DEVICE_ID_INTEL_ICH8:
case PCI_DEVICE_ID_INTEL_ICH8M:
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
gpio_registers = ich8_gpio_registers;
@@ -180,6 +181,7 @@ int print_gpios(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH7M:
case PCI_DEVICE_ID_INTEL_ICH7DH:
case PCI_DEVICE_ID_INTEL_ICH7MDH:
+ case PCI_DEVICE_ID_INTEL_NM10:
gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
gpio_registers = ich7_gpio_registers;
size = ARRAY_SIZE(ich7_gpio_registers);
diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c
index 678930d5c2..c6a835fd7e 100644
--- a/util/inteltool/inteltool.c
+++ b/util/inteltool/inteltool.c
@@ -61,6 +61,8 @@ static const struct {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9M, "ICH9M" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9ME, "ICH9M-E" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8M, "ICH8-M" },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8, "ICH8" },
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10, "NM10" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" },
diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h
index c0a2c2066b..8eb7089505 100644
--- a/util/inteltool/inteltool.h
+++ b/util/inteltool/inteltool.h
@@ -43,6 +43,8 @@
#define PCI_DEVICE_ID_INTEL_ICH7 0x27b8
#define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9
#define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd
+#define PCI_DEVICE_ID_INTEL_NM10 0x27bc
+#define PCI_DEVICE_ID_INTEL_ICH8 0x2810
#define PCI_DEVICE_ID_INTEL_ICH8M 0x2815
#define PCI_DEVICE_ID_INTEL_ICH9DH 0x2912
#define PCI_DEVICE_ID_INTEL_ICH9DO 0x2914
diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c
index f7275843f1..5f938353ee 100644
--- a/util/inteltool/powermgt.c
+++ b/util/inteltool/powermgt.c
@@ -477,6 +477,7 @@ int print_pmbase(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH7M:
case PCI_DEVICE_ID_INTEL_ICH7DH:
case PCI_DEVICE_ID_INTEL_ICH7MDH:
+ case PCI_DEVICE_ID_INTEL_NM10:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich7_pm_registers;
size = ARRAY_SIZE(ich7_pm_registers);
@@ -491,6 +492,7 @@ int print_pmbase(struct pci_dev *sb)
pm_registers = ich9_pm_registers;
size = ARRAY_SIZE(ich9_pm_registers);
break;
+ case PCI_DEVICE_ID_INTEL_ICH8:
case PCI_DEVICE_ID_INTEL_ICH8M:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich8_pm_registers;
diff --git a/util/inteltool/rootcmplx.c b/util/inteltool/rootcmplx.c
index b89e6a1b6b..215c150756 100644
--- a/util/inteltool/rootcmplx.c
+++ b/util/inteltool/rootcmplx.c
@@ -43,6 +43,8 @@ int print_rcba(struct pci_dev *sb)
case PCI_DEVICE_ID_INTEL_ICH9M:
case PCI_DEVICE_ID_INTEL_ICH9ME:
case PCI_DEVICE_ID_INTEL_ICH8M:
+ case PCI_DEVICE_ID_INTEL_ICH8:
+ case PCI_DEVICE_ID_INTEL_NM10:
rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
break;
case PCI_DEVICE_ID_INTEL_ICH: