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-rw-r--r--src/arch/i386/boot/coreboot_table.c12
-rw-r--r--src/arch/i386/boot/coreboot_table.h3
-rw-r--r--src/config/Options.lb6
-rw-r--r--src/include/boot/coreboot_tables.h6
-rw-r--r--src/mainboard/amd/dbm690t/Options.lb2
-rw-r--r--src/mainboard/amd/dbm690t/mainboard.c21
-rw-r--r--src/southbridge/amd/rs690/rs690_cmn.c2
7 files changed, 34 insertions, 18 deletions
diff --git a/src/arch/i386/boot/coreboot_table.c b/src/arch/i386/boot/coreboot_table.c
index 427b978d96..e74e3e9fef 100644
--- a/src/arch/i386/boot/coreboot_table.c
+++ b/src/arch/i386/boot/coreboot_table.c
@@ -357,7 +357,8 @@ static void lb_remove_memory_range(struct lb_memory *mem,
}
}
-static void lb_add_memory_range(struct lb_memory *mem,
+/* This function is used in mainboard specific code, too */
+void lb_add_memory_range(struct lb_memory *mem,
uint32_t type, uint64_t start, uint64_t size)
{
lb_remove_memory_range(mem, start, size);
@@ -447,15 +448,10 @@ unsigned long write_coreboot_table(
lb_add_memory_range(mem, LB_MEM_TABLE,
rom_table_start, rom_table_end-rom_table_start);
- /* AMD rs690 chip, we should remove the UMA from system memory. */
-#if (CONFIG_GFXUMA == 1)
- printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
- uma_memory_start, uma_memory_size);
- lb_add_memory_range(mem, LB_MEM_TABLE,
- uma_memory_start, uma_memory_size);
+#if (HAVE_MAINBOARD_RESOURCES == 1)
+ add_mainboard_resources(mem);
#endif
-
/* Note:
* I assume that there is always memory at immediately after
* the low_table_end. This means that after I setup the coreboot table.
diff --git a/src/arch/i386/boot/coreboot_table.h b/src/arch/i386/boot/coreboot_table.h
index a5ba0f5963..4c8c44a18c 100644
--- a/src/arch/i386/boot/coreboot_table.h
+++ b/src/arch/i386/boot/coreboot_table.h
@@ -26,4 +26,7 @@ struct lb_memory *get_lb_mem(void);
extern struct cmos_option_table option_table;
+/* defined by mainboard.c if the mainboard requires extra resources */
+int add_mainboard_resources(struct lb_memory *mem);
+
#endif /* COREBOOT_TABLE_H */
diff --git a/src/config/Options.lb b/src/config/Options.lb
index 5dfa013e7b..2301905712 100644
--- a/src/config/Options.lb
+++ b/src/config/Options.lb
@@ -1101,6 +1101,12 @@ define CONFIG_GFXUMA
comment "GFX UMA"
end
+define HAVE_MAINBOARD_RESOURCES
+ default 0
+ export always
+ comment "Enable if the mainboard/chipset requires extra entries in the memory map"
+end
+
define CONFIG_SPLASH_GRAPHIC
default 0
export used
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index e9e1b8f3de..3f8e60698e 100644
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -43,12 +43,6 @@
* See also: util/lbtdump/lbtdump.c
*/
-/* AMD rs690 chip, declare global variables. */
-#if (CONFIG_GFXUMA == 1)
- unsigned long uma_memory_start, uma_memory_size;
-#endif
-
-
struct lb_uint64 {
uint32_t lo;
uint32_t hi;
diff --git a/src/mainboard/amd/dbm690t/Options.lb b/src/mainboard/amd/dbm690t/Options.lb
index cf73999a4f..b5ec9a62cf 100644
--- a/src/mainboard/amd/dbm690t/Options.lb
+++ b/src/mainboard/amd/dbm690t/Options.lb
@@ -91,6 +91,7 @@ uses CONFIG_USE_PRINTK_IN_CAR
uses CONFIG_VIDEO_MB
uses CONFIG_GFXUMA
+uses HAVE_MAINBOARD_RESOURCES
###
### Build options
@@ -299,6 +300,7 @@ default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
default CONFIG_VIDEO_MB=1
default CONFIG_GFXUMA=1
+default HAVE_MAINBOARD_RESOURCES=1
### End Options.lb
end
diff --git a/src/mainboard/amd/dbm690t/mainboard.c b/src/mainboard/amd/dbm690t/mainboard.c
index 568670f737..72bf04bd29 100644
--- a/src/mainboard/amd/dbm690t/mainboard.c
+++ b/src/mainboard/amd/dbm690t/mainboard.c
@@ -41,6 +41,8 @@ extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
#define ADT7461_write_byte(address, val) \
do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
+unsigned long uma_memory_start, uma_memory_size;
+
/********************************************************
* dbm690t uses a BCM5789 as on-board NIC.
* It has a pin named LOW_POWER to enable it into LOW POWER state.
@@ -241,13 +243,24 @@ void dbm690t_enable(device_t dev)
get_ide_dma66();
set_thermal_config();
}
+
+int add_mainboard_resources(struct lb_memory *mem)
+{
+ /* UMA is removed from system memory in the northbridge code, but
+ * in some circumstances we want the memory mentioned as reserved.
+ */
+#if (CONFIG_GFXUMA == 1)
+ printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
+ uma_memory_start, uma_memory_size);
+ lb_add_memory_range(mem, LB_MEM_RESERVED,
+ uma_memory_start, uma_memory_size);
+#endif
+}
/*
* CONFIG_CHIP_NAME defined in Option.lb.
*/
struct chip_operations mainboard_amd_dbm690t_ops = {
-#if CONFIG_CHIP_NAME == 1
- CHIP_NAME("AMD Dbm690t Mainboard")
-#endif
- .enable_dev = dbm690t_enable,
+ CHIP_NAME("AMD DBM690T Mainboard")
+ .enable_dev = dbm690t_enable,
};
diff --git a/src/southbridge/amd/rs690/rs690_cmn.c b/src/southbridge/amd/rs690/rs690_cmn.c
index b714dc87c5..d50a48547c 100644
--- a/src/southbridge/amd/rs690/rs690_cmn.c
+++ b/src/southbridge/amd/rs690/rs690_cmn.c
@@ -307,6 +307,8 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port)
*/
void rs690_set_tom(device_t nb_dev)
{
+ extern unsigned long uma_memory_start;
+
/* set TOM */
pci_write_config32(nb_dev, 0x90, uma_memory_start);
nbmc_write_index(nb_dev, 0x1e, uma_memory_start);