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-rw-r--r--src/mainboard/amd/olivehillplus/romstage.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c
index 367fa6a776..f603d738c5 100644
--- a/src/mainboard/amd/olivehillplus/romstage.c
+++ b/src/mainboard/amd/olivehillplus/romstage.c
@@ -40,7 +40,6 @@
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
- volatile int halt = 0;
/*
* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for
@@ -64,9 +63,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
console_init();
}
- if(boot_cpu()) {
- while(halt);
- }
/* Halt if there was a built in self test failure */
post_code(0x34);
report_bist_failure(bist);