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-rw-r--r--Documentation/mainboard/index.md1
-rw-r--r--Documentation/mainboard/intel/icelake_rvp.md40
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diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
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--- a/Documentation/mainboard/index.md
+++ b/Documentation/mainboard/index.md
@@ -23,6 +23,7 @@ The boards in this section are not real mainboards, but emulators.
## Intel
- [DG43GT](intel/dg43gt.md)
+- [IceLake RVP](intel/icelake_rvp.md)
## Foxconn
diff --git a/Documentation/mainboard/intel/icelake_rvp.md b/Documentation/mainboard/intel/icelake_rvp.md
new file mode 100644
index 0000000000..09f2185b0b
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+++ b/Documentation/mainboard/intel/icelake_rvp.md
@@ -0,0 +1,40 @@
+# Intel Ice Lake RVP (Reference Validation Platform)
+
+This page describes how to run coreboot on the Intel icelake_rvp board.
+
+Ice Lake RVP is based on Intel Ice Lake platform, please refer to below link to get more details
+```eval_rst
+:doc:`../../soc/intel/iceLake_coreboot_development.md`
+```
+
+## Building coreboot
+
+* Follow build instructions mentioned in Ice Lake document
+```eval_rst
+:doc:`../../soc/intel/iceLake_coreboot_development.md`
+```
+
+* The default options for this board should result in a fully working image:
+```bash
+ # echo "CONFIG_VENDOR_INTEL=y" > .config
+ # echo "CONFIG_BOARD_INTEL_ICELAKE_RVPU=y" >> .config
+ # make olddefconfig && make
+```
+
+## Flashing coreboot
+
+```eval_rst
++---------------------+------------+
+| Type | Value |
++=====================+============+
+| Socketed flash | no |
++---------------------+------------+
+| Vendor | Winbond |
++---------------------+------------+
+| Size | 32 MiB |
++---------------------+------------+
+| Internal flashing | yes |
++---------------------+------------+
+| External flashing | yes |
++---------------------+------------+
+```