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-rw-r--r--src/cpu/amd/agesa/s3_resume.h4
-rw-r--r--src/southbridge/amd/Makefile.inc2
-rw-r--r--src/southbridge/amd/agesa/hudson/Kconfig8
-rw-r--r--src/southbridge/amd/cimx/sb700/Kconfig8
-rw-r--r--src/southbridge/amd/cimx/sb800/Kconfig8
-rwxr-xr-xsrc/southbridge/amd/cimx/sb900/Kconfig8
6 files changed, 37 insertions, 1 deletions
diff --git a/src/cpu/amd/agesa/s3_resume.h b/src/cpu/amd/agesa/s3_resume.h
index 367cc3fbba..af5b509adb 100644
--- a/src/cpu/amd/agesa/s3_resume.h
+++ b/src/cpu/amd/agesa/s3_resume.h
@@ -28,6 +28,10 @@
#define S3_DATA_MTRR_POS (CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE)
#define S3_DATA_NONVOLATILE_POS (CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE)
+#if (S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE
+#error "Please increase the value of S3_DATA_SIZE"
+#endif
+
typedef enum {
S3DataTypeNonVolatile=0, ///< NonVolatile Data Type
S3DataTypeVolatile ///< Volatile Data Type
diff --git a/src/southbridge/amd/Makefile.inc b/src/southbridge/amd/Makefile.inc
index 5f5431492c..cce4702058 100644
--- a/src/southbridge/amd/Makefile.inc
+++ b/src/southbridge/amd/Makefile.inc
@@ -22,7 +22,7 @@ ifeq ($(CONFIG_CPU_AMD_AGESA), y)
$(obj)/coreboot_s3nv.rom: $(obj)/config.h
echo " S3 NVRAM $(CONFIG_S3_DATA_POS) (S3 storage area)"
# force C locale, so cygwin awk doesn't try to interpret the 0xff below as UTF-8 (or worse)
- LC_ALL=C awk 'BEGIN {for (i=0; i<32768; i++) {printf "%c", 255}}' > $@.tmp
+ printf %d $(CONFIG_S3_DATA_SIZE) | LC_ALL=C awk '{for (i=0; i<$$1; i++) {printf "%c", 255}}' > $@.tmp
mv $@.tmp $@
cbfs-files-y += s3nv
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index a7436b50fc..f9013196f2 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -209,6 +209,14 @@ config S3_DATA_POS
For a system with S3 feature, the BIOS needs to save some data to
non-volatile storage at cold boot stage.
+config S3_DATA_SIZE
+ int "S3 volatile storage size"
+ default 32768
+ depends on HAVE_ACPI_RESUME
+ help
+ For a system with S3 feature, the BIOS needs to save some data to
+ non-volatile storage at cold boot stage.
+
config HUDSON_LEGACY_FREE
bool "System is legacy free"
help
diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig
index 706309d389..37e9614ce5 100644
--- a/src/southbridge/amd/cimx/sb700/Kconfig
+++ b/src/southbridge/amd/cimx/sb700/Kconfig
@@ -68,5 +68,13 @@ config S3_DATA_POS
For a system with S3 feature, the BIOS needs to save some data to
non-volatile storage at cold boot stage.
+config S3_DATA_SIZE
+ int "S3 volatile storage size"
+ default 32768
+ depends on HAVE_ACPI_RESUME
+ help
+ For a system with S3 feature, the BIOS needs to save some data to
+ non-volatile storage at cold boot stage.
+
endif #SOUTHBRIDGE_AMD_CIMX_SB700
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index f56e017d2d..2af0b32df6 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -130,6 +130,14 @@ config S3_DATA_POS
For a system with S3 feature, the BIOS needs to save some data to
non-volatile storage at cold boot stage.
+config S3_DATA_SIZE
+ int "S3 volatile storage size"
+ default 32768
+ depends on HAVE_ACPI_RESUME
+ help
+ For a system with S3 feature, the BIOS needs to save some data to
+ non-volatile storage at cold boot stage.
+
config SB800_IMC_FWM
bool "Add IMC firmware"
default n
diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig
index 3cadba1293..c886504e58 100755
--- a/src/southbridge/amd/cimx/sb900/Kconfig
+++ b/src/southbridge/amd/cimx/sb900/Kconfig
@@ -61,5 +61,13 @@ config S3_DATA_POS
For a system with S3 feature, the BIOS needs to save some data to
non-volatile storage at cold boot stage.
+config S3_DATA_SIZE
+ int "S3 volatile storage size"
+ default 32768
+ depends on HAVE_ACPI_RESUME
+ help
+ For a system with S3 feature, the BIOS needs to save some data to
+ non-volatile storage at cold boot stage.
+
endif #SOUTHBRIDGE_AMD_CIMX_SB900