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-rw-r--r--src/drivers/intel/fsp2_0/Kconfig8
-rw-r--r--src/soc/intel/common/Makefile.inc3
-rw-r--r--src/soc/intel/common/fsp_reset.c16
3 files changed, 27 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index ad7afd8045..f12ff6e6a7 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -228,6 +228,7 @@ config FSP_STATUS_GLOBAL_RESET_REQUIRED_8
config FSP_STATUS_GLOBAL_RESET
hex
+ depends on SOC_INTEL_COMMON_FSP_RESET
default 0x40000003 if FSP_STATUS_GLOBAL_RESET_REQUIRED_3
default 0x40000004 if FSP_STATUS_GLOBAL_RESET_REQUIRED_4
default 0x40000005 if FSP_STATUS_GLOBAL_RESET_REQUIRED_5
@@ -240,6 +241,13 @@ config FSP_STATUS_GLOBAL_RESET
reset type from SoC Kconfig based on available Kconfig options
FSP_STATUS_GLOBAL_RESET_REQUIRED_X. Default is unsupported.
+config SOC_INTEL_COMMON_FSP_RESET
+ bool
+ help
+ Common code block to handle platform reset request raised by FSP. The FSP
+ will use the FSP EAS v2.0 section 12.2.2 (OEM Status Code) to indicate that
+ a reset is required.
+
if FSP_PEIM_TO_PEIM_INTERFACE
source "src/drivers/intel/fsp2_0/ppi/Kconfig"
endif
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc
index 22d350ccdb..9993bceedf 100644
--- a/src/soc/intel/common/Makefile.inc
+++ b/src/soc/intel/common/Makefile.inc
@@ -27,6 +27,9 @@ romstage-$(CONFIG_TPM_CR50) += tpm_tis.c
ramstage-$(CONFIG_TPM_CR50) += tpm_tis.c
postcar-$(CONFIG_TPM_CR50) += tpm_tis.c
+romstage-$(CONFIG_SOC_INTEL_COMMON_FSP_RESET) += fsp_reset.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_FSP_RESET) += fsp_reset.c
+
ifeq ($(CONFIG_MMA),y)
MMA_BLOBS_PATH = $(call strip_quotes,$(CONFIG_MMA_BLOBS_PATH))
MMA_TEST_NAMES = $(notdir $(wildcard $(MMA_BLOBS_PATH)/tests/*))
diff --git a/src/soc/intel/common/fsp_reset.c b/src/soc/intel/common/fsp_reset.c
new file mode 100644
index 0000000000..e89fe4cc53
--- /dev/null
+++ b/src/soc/intel/common/fsp_reset.c
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <fsp/util.h>
+#include <soc/intel/common/reset.h>
+
+void chipset_handle_reset(uint32_t status)
+{
+ if (status == CONFIG_FSP_STATUS_GLOBAL_RESET) {
+ printk(BIOS_DEBUG, "GLOBAL RESET!\n");
+ global_reset();
+ }
+
+ printk(BIOS_ERR, "unhandled reset type %x\n", status);
+ die("unknown reset type");
+}