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-rw-r--r--src/soc/rockchip/rk3399/Makefile.inc3
-rw-r--r--src/soc/rockchip/rk3399/include/soc/sdram.h15
-rw-r--r--src/soc/rockchip/rk3399/sdram.c21
3 files changed, 33 insertions, 6 deletions
diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc
index 957124e54e..718426b137 100644
--- a/src/soc/rockchip/rk3399/Makefile.inc
+++ b/src/soc/rockchip/rk3399/Makefile.inc
@@ -26,6 +26,7 @@ bootblock-y += clock.c
bootblock-y += timer.c
verstage-y += ../common/cbmem.c
+verstage-y += sdram.c
verstage-y += ../common/spi.c
verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
verstage-y += clock.c
@@ -34,6 +35,7 @@ verstage-y += timer.c
################################################################################
romstage-y += ../common/cbmem.c
+romstage-y += sdram.c
romstage-y += ../common/spi.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
romstage-y += clock.c
@@ -43,6 +45,7 @@ romstage-y += romstage.c
################################################################################
ramstage-y += ../common/cbmem.c
+ramstage-y += sdram.c
ramstage-y += ../common/spi.c
ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
ramstage-y += clock.c
diff --git a/src/soc/rockchip/rk3399/include/soc/sdram.h b/src/soc/rockchip/rk3399/include/soc/sdram.h
index 808393ceff..fb5d8cd319 100644
--- a/src/soc/rockchip/rk3399/include/soc/sdram.h
+++ b/src/soc/rockchip/rk3399/include/soc/sdram.h
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright 2016 Google Inc.
+ * Copyright 2016 Rockchip Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -13,8 +13,11 @@
* GNU General Public License for more details.
*/
-/* dummy until the RAM init implementation passed review */
-static int sdram_size_mb(void)
-{
- return 0;
-}
+#ifndef __SOC_ROCKCHIP_RK3399_SDRAM_H__
+#define __SOC_ROCKCHIP_RK3399_SDRAM_H__
+
+#include <stddef.h>
+
+size_t sdram_size_mb(void);
+
+#endif
diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c
new file mode 100644
index 0000000000..00adc9e73f
--- /dev/null
+++ b/src/soc/rockchip/rk3399/sdram.c
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Rockchip Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/sdram.h>
+
+size_t sdram_size_mb(void)
+{
+ return CONFIG_DRAM_SIZE_MB;
+}