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-rw-r--r--src/soc/intel/cannonlake/romstage/power_state.c8
-rw-r--r--src/soc/intel/common/block/pmc/pmclib.c8
-rw-r--r--src/soc/intel/skylake/pmutil.c8
3 files changed, 8 insertions, 16 deletions
diff --git a/src/soc/intel/cannonlake/romstage/power_state.c b/src/soc/intel/cannonlake/romstage/power_state.c
index b62e5fd4b8..838a056a9e 100644
--- a/src/soc/intel/cannonlake/romstage/power_state.c
+++ b/src/soc/intel/cannonlake/romstage/power_state.c
@@ -24,14 +24,6 @@
#include <soc/pci_devs.h>
#include <soc/pm.h>
-int acpi_get_sleep_type(void)
-{
- struct chipset_power_state *ps;
-
- ps = pmc_get_power_state();
- return ps->prev_sleep_state;
-}
-
static inline int deep_s3_enabled(void)
{
uint32_t deep_s3_pol;
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 52bfaecd3d..3fb386642a 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -93,6 +93,14 @@ __weak void pmc_soc_restore_power_failure(void)
*/
}
+int acpi_get_sleep_type(void)
+{
+ struct chipset_power_state *ps;
+
+ ps = pmc_get_power_state();
+ return ps->prev_sleep_state;
+}
+
static uint32_t pmc_reset_smi_status(void)
{
uint32_t smi_sts = inl(ACPI_BASE_ADDRESS + SMI_STS);
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index 2c399c7ade..2e1d1713e1 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -309,11 +309,3 @@ void soc_fill_power_state(struct chipset_power_state *ps)
printk(BIOS_DEBUG, "GBLRST_CAUSE: %08x %08x\n",
ps->gblrst_cause[0], ps->gblrst_cause[1]);
}
-
-int acpi_get_sleep_type(void)
-{
- struct chipset_power_state *ps;
-
- ps = pmc_get_power_state();
- return ps->prev_sleep_state;
-}