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-rw-r--r--src/mainboard/google/hatch/romstage.c4
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h3
2 files changed, 5 insertions, 2 deletions
diff --git a/src/mainboard/google/hatch/romstage.c b/src/mainboard/google/hatch/romstage.c
index 69fee28025..a94fab5df9 100644
--- a/src/mainboard/google/hatch/romstage.c
+++ b/src/mainboard/google/hatch/romstage.c
@@ -29,7 +29,7 @@
*/
#define GPIO_MEM_CH_SEL GPP_F2
-static int memory_sku(void)
+int __weak variant_memory_sku(void)
{
const gpio_t spd_gpios[] = {
GPIO_MEM_CONFIG_0,
@@ -48,7 +48,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
int is_single_ch_mem;
variant_memory_params(&memcfg);
- mem_sku = memory_sku();
+ mem_sku = variant_memory_sku();
/*
* GPP_F2 is the MEM_CH_SEL gpio, which is set to 1 for single
* channel skus and 0 for dual channel skus.
diff --git a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h
index 17bd5df63d..864d140f0e 100644
--- a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h
@@ -34,6 +34,9 @@ const struct pad_config *override_early_gpio_table(size_t *num);
/* Return board specific memory configuration */
void variant_memory_params(struct cnl_mb_cfg *bcfg);
+/* Return memory SKU for the variant */
+int variant_memory_sku(void);
+
/* Return variant specific gpio pads to be configured during sleep */
const struct pad_config *variant_sleep_gpio_table(u8 slp_typ, size_t *num);