diff options
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/chip.h | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index f56e1f22ea..610faa8273 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -120,6 +120,8 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd) /* First 4k in BAR0 is used for IPC, real registers start at 4k offset */ silconfig->PmcBase = PMC_BAR0 + 0x1000; silconfig->P2sbBase = P2SB_BAR; + + silconfig->IshEnable = cfg->integrated_sensor_hub_enable; } struct chip_operations soc_intel_apollolake_ops = { diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index d74084ebff..3d9f5bd2d7 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -42,6 +42,9 @@ struct soc_intel_apollolake_config { /* Configure serial IRQ (SERIRQ) line. */ enum serirq_mode serirq_mode; + + /* Integrated Sensor Hub */ + uint8_t integrated_sensor_hub_enable; }; #endif /* _SOC_APOLLOLAKE_CHIP_H_ */ |