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-rw-r--r--src/soc/intel/skylake/chip.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 88d598f9a8..b4f6545c36 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -94,6 +94,9 @@ struct soc_intel_skylake_config {
/* TCC activation offset */
int tcc_offset;
+ /* PL2 Override value in Watts */
+ u32 tdp_pl2_override;
+
/*
* The following fields come from FspUpdVpd.h.
* These are configuration values that are passed to FSP during
@@ -392,8 +395,6 @@ struct soc_intel_skylake_config {
* Setting to 0 (default) disables Heci1 and hides the device from OS
*/
u8 HeciEnabled;
- /* PL2 Override value in Watts */
- u32 tdp_pl2_override;
u8 PmTimerDisabled;
/* Intel Speed Shift Technology */
u8 speed_shift_enable;