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-rw-r--r--src/southbridge/intel/lynxpoint/me_9.x.c3
-rw-r--r--src/southbridge/intel/lynxpoint/usb_xhci.c23
2 files changed, 12 insertions, 14 deletions
diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 61684985a8..574a8308d6 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -650,10 +650,9 @@ static int me_icc_set_clock_enables(u32 mask)
if (mei_sendrecv_icc(&icc, &clk, sizeof(clk), NULL, 0) < 0) {
printk(BIOS_ERR, "ME: ICC SET CLOCK ENABLES message failed\n");
return -1;
- } else {
- printk(BIOS_INFO, "ME: ICC SET CLOCK ENABLES 0x%08x\n", mask);
}
+ printk(BIOS_INFO, "ME: ICC SET CLOCK ENABLES 0x%08x\n", mask);
return 0;
}
diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c
index 28e6521598..41d99f6842 100644
--- a/src/southbridge/intel/lynxpoint/usb_xhci.c
+++ b/src/southbridge/intel/lynxpoint/usb_xhci.c
@@ -40,20 +40,19 @@ static int usb_xhci_port_count_usb3(device_t dev)
if (pch_is_lp()) {
/* LynxPoint-LP has 4 SS ports */
return 4;
- } else {
+ }
/* LynxPoint-H can have 0, 2, 4, or 6 SS ports */
- u8 *mem_base = usb_xhci_mem_base(dev);
- u32 fus = read32(mem_base + XHCI_USB3FUS);
- fus >>= XHCI_USB3FUS_SS_SHIFT;
- fus &= XHCI_USB3FUS_SS_MASK;
- switch (fus) {
- case 3: return 0;
- case 2: return 2;
- case 1: return 4;
- case 0: default: return 6;
- }
+ u8 *mem_base = usb_xhci_mem_base(dev);
+ u32 fus = read32(mem_base + XHCI_USB3FUS);
+ fus >>= XHCI_USB3FUS_SS_SHIFT;
+ fus &= XHCI_USB3FUS_SS_MASK;
+ switch (fus) {
+ case 3: return 0;
+ case 2: return 2;
+ case 1: return 4;
+ case 0:
+ default: return 6;
}
- return 0;
}
static void usb_xhci_reset_status_usb3(u8 *mem_base, int port)