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| -rw-r--r-- | Documentation/mainboard/sifive/hifive-unleashed.md | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/Documentation/mainboard/sifive/hifive-unleashed.md b/Documentation/mainboard/sifive/hifive-unleashed.md index cd7c93ca0b..495dade212 100644 --- a/Documentation/mainboard/sifive/hifive-unleashed.md +++ b/Documentation/mainboard/sifive/hifive-unleashed.md @@ -12,15 +12,13 @@ For general setup instructions, please refer to the [Getting Started Guide]. The following things are still missing from this coreboot port: - Support running romstage from flash (fix stack) to support boot mode 1 -- CBMEM support -- FU540 clock configuration -- FU540 RAM init -- Placing the ramstage in DRAM - Starting the U54 cores - FU540 PIN configuration and GPIO access macros - Provide serial number to payload (e.g. in device tree) +- Implement instruction emulation - Support for booting Linux on RISC-V - +- Add support to run OpenSBI payload in m-mode +- SMP support in trap handler ## Configuration |