diff options
| -rw-r--r-- | src/southbridge/intel/lynxpoint/early_pch.c | 6 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/early_usb.c | 5 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index 38506c9438..9909bb6d44 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -42,6 +42,12 @@ const struct rcba_config_instruction pch_early_config[] = { RCBA_END_CONFIG, }; +int pch_is_lp(void) +{ + u8 id = pci_read_config8(PCH_LPC_DEV, PCI_DEVICE_ID + 1); + return id == PCH_TYPE_LPT_LP; +} + static void pch_enable_bars(void) { /* Setting up Southbridge. In the northbridge code. */ diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c index 9a1a4cb35e..d328ef6818 100644 --- a/src/southbridge/intel/lynxpoint/early_usb.c +++ b/src/southbridge/intel/lynxpoint/early_usb.c @@ -54,7 +54,6 @@ static void enable_usb_bar_on_device(device_t dev, u32 bar) void enable_usb_bar(void) { enable_usb_bar_on_device(PCH_EHCI1_DEV, PCH_EHCI1_TEMP_BAR0); -#if !CONFIG_INTEL_LYNXPOINT_LP - enable_usb_bar_on_device(PCH_EHCI2_DEV, PCH_EHCI2_TEMP_BAR0); -#endif + if (!pch_is_lp()) + enable_usb_bar_on_device(PCH_EHCI2_DEV, PCH_EHCI2_TEMP_BAR0); } |