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-rw-r--r--src/mainboard/emulation/qemu-q35/bootblock.c2
-rw-r--r--src/mainboard/emulation/qemu-q35/q35.h (renamed from src/mainboard/emulation/qemu-q35/gm35.h)4
-rw-r--r--src/mainboard/emulation/qemu-q35/romstage.c2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/emulation/qemu-q35/bootblock.c b/src/mainboard/emulation/qemu-q35/bootblock.c
index 6de3dd820b..5cf2eb7bee 100644
--- a/src/mainboard/emulation/qemu-q35/bootblock.c
+++ b/src/mainboard/emulation/qemu-q35/bootblock.c
@@ -6,7 +6,7 @@
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <console/console.h>
-#include "gm35.h"
+#include "q35.h"
static void bootblock_northbridge_init(void)
{
diff --git a/src/mainboard/emulation/qemu-q35/gm35.h b/src/mainboard/emulation/qemu-q35/q35.h
index 62b04b8625..f2a49a62f5 100644
--- a/src/mainboard/emulation/qemu-q35/gm35.h
+++ b/src/mainboard/emulation/qemu-q35/q35.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#ifndef __MAINBOARD_EMU_GM35_H__
-#define __MAINBOARD_EMU_GM35_H__
+#ifndef __MAINBOARD_EMU_Q35_H__
+#define __MAINBOARD_EMU_Q35_H__
#define D0F0_PCIEXBAR_LO 0x60
#define D0F0_PCIEXBAR_HI 0x64
diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c
index 92b6113427..465edc84c4 100644
--- a/src/mainboard/emulation/qemu-q35/romstage.c
+++ b/src/mainboard/emulation/qemu-q35/romstage.c
@@ -6,7 +6,7 @@
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <device/pci_ops.h>
-#include "gm35.h"
+#include "q35.h"
static void mainboard_machine_check(void)
{