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-rw-r--r--src/soc/amd/picasso/acpi.c23
-rw-r--r--src/soc/amd/picasso/chip.h12
2 files changed, 33 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index ac23d0f1e9..2eea6f9aeb 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -10,6 +10,7 @@
#include <acpi/acpigen.h>
#include <device/pci_ops.h>
#include <arch/ioapic.h>
+#include <arch/smp/mpspec.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>
#include <device/device.h>
@@ -23,6 +24,7 @@
#include <soc/nvs.h>
#include <soc/gpio.h>
#include <version.h>
+#include "chip.h"
unsigned long acpi_fill_mcfg(unsigned long current)
{
@@ -38,6 +40,11 @@ unsigned long acpi_fill_mcfg(unsigned long current)
unsigned long acpi_fill_madt(unsigned long current)
{
+ const struct soc_amd_picasso_config *cfg = config_of_soc();
+ unsigned int i;
+ uint8_t irq;
+ uint8_t flags;
+
/* create all subtables for processors */
current = acpi_create_madt_lapics(current);
@@ -51,8 +58,20 @@ unsigned long acpi_fill_madt(unsigned long current)
/* 5 mean: 0101 --> Edge-triggered, Active high */
current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
current, 0, 0, 2, 0);
- current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
- current, 0, 9, 9, 0xf);
+ current += acpi_create_madt_irqoverride(
+ (acpi_madt_irqoverride_t *)current, 0, 9, 9,
+ MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
+
+ for (i = 0; i < ARRAY_SIZE(cfg->irq_override); ++i) {
+ irq = cfg->irq_override[i].irq;
+ flags = cfg->irq_override[i].flags;
+
+ if (!flags)
+ continue;
+
+ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, 0,
+ irq, irq, flags);
+ }
/* create all subtables for processors */
current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current,
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 80cb1ceab2..e52751a2eb 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -12,6 +12,7 @@
#include <soc/iomap.h>
#include <soc/southbridge.h>
#include <acpi/acpi_device.h>
+#include <arch/smp/mpspec.h>
struct soc_amd_picasso_config {
struct soc_amd_common_config common_config;
@@ -34,6 +35,17 @@ struct soc_amd_picasso_config {
I2S_PINS_UNCONF = 7, /* All pads will be input mode */
} acp_pin_cfg;
+ /**
+ * IRQ 0 - 15 have a default trigger of edge and default polarity of high.
+ * If you have a device that requires a different configuration you can override the
+ * settings here.
+ */
+ struct {
+ uint8_t irq;
+ /* See MP_IRQ_* from mpspec.h */
+ uint8_t flags;
+ } irq_override[16];
+
/* Options for these are in src/arch/x86/include/acpi/acpi.h */
uint8_t fadt_pm_profile;
uint16_t fadt_boot_arch;