summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/soc/amd/stoneyridge/Kconfig1
-rw-r--r--src/soc/amd/stoneyridge/ramtop.c12
2 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 9c184edb2d..6584fbb713 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -35,7 +35,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_USBDEBUG_OPTIONS
select HAVE_HARD_RESET
select LAPIC_MONOTONIC_TIMER
- select LATE_CBMEM_INIT
select SPI_FLASH if HAVE_ACPI_RESUME
select TSC_SYNC_LFENCE
select SOC_AMD_COMMON
diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c
index 8fa81c715a..c81e73b4e1 100644
--- a/src/soc/amd/stoneyridge/ramtop.c
+++ b/src/soc/amd/stoneyridge/ramtop.c
@@ -15,6 +15,8 @@
#include <stdint.h>
#include <arch/io.h>
+#include <cpu/x86/msr.h>
+#include <cpu/amd/mtrr.h>
#include <cbmem.h>
#define CBMEM_TOP_SCRATCHPAD 0x78
@@ -31,3 +33,13 @@ uintptr_t restore_top_of_low_cacheable(void)
top_cache = pci_read_config16(PCI_DEV(0,0,0), CBMEM_TOP_SCRATCHPAD);
return (top_cache << 16);
}
+
+void *cbmem_top(void)
+{
+ msr_t tom = rdmsr(TOP_MEM);
+
+ if (!tom.lo)
+ return 0;
+ else
+ return (void *)restore_top_of_low_cacheable();
+}