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-rw-r--r--src/arch/x86/include/arch/pci_ops.h10
-rw-r--r--src/arch/x86/lib/Makefile.inc1
-rw-r--r--src/arch/x86/lib/pci_ops_auto.c107
-rw-r--r--src/arch/x86/lib/pci_ops_conf2.c80
-rw-r--r--src/devices/oprom/x86_interrupts.c2
-rw-r--r--src/include/device/pci.h2
-rw-r--r--src/include/device/pci_ops.h3
7 files changed, 9 insertions, 196 deletions
diff --git a/src/arch/x86/include/arch/pci_ops.h b/src/arch/x86/include/arch/pci_ops.h
index 955ccd34d8..eca939045f 100644
--- a/src/arch/x86/include/arch/pci_ops.h
+++ b/src/arch/x86/include/arch/pci_ops.h
@@ -2,12 +2,18 @@
#define ARCH_I386_PCI_OPS_H
extern const struct pci_bus_operations pci_cf8_conf1;
-extern const struct pci_bus_operations pci_cf8_conf2;
#if CONFIG_MMCONF_SUPPORT
extern const struct pci_bus_operations pci_ops_mmconf;
#endif
-void pci_set_method(device_t dev);
+static inline const struct pci_bus_operations *pci_config_default(void)
+{
+ return &pci_cf8_conf1;
+}
+static inline void pci_set_method(device_t dev)
+{
+ dev->ops->ops_pci_bus = pci_config_default();
+}
#endif /* ARCH_I386_PCI_OPS_H */
diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc
index 4375952c19..2186072ab4 100644
--- a/src/arch/x86/lib/Makefile.inc
+++ b/src/arch/x86/lib/Makefile.inc
@@ -3,7 +3,6 @@ ramstage-y += cpu.c
ramstage-y += pci_ops_conf1.c
ramstage-$(CONFIG_PCI_CONF2) += pci_ops_conf2.c
ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
-ramstage-y += pci_ops_auto.c
ramstage-y += exception.c
ramstage-$(CONFIG_IOAPIC) += ioapic.c
ramstage-y += memset.c
diff --git a/src/arch/x86/lib/pci_ops_auto.c b/src/arch/x86/lib/pci_ops_auto.c
deleted file mode 100644
index 58e098b655..0000000000
--- a/src/arch/x86/lib/pci_ops_auto.c
+++ /dev/null
@@ -1,107 +0,0 @@
-#include <stddef.h>
-#include <console/console.h>
-#include <arch/io.h>
-#include <arch/pciconf.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-
-#if CONFIG_PCI_CONF2
-/*
- * Before we decide to use direct hardware access mechanisms, we try to do some
- * trivial checks to ensure it at least _seems_ to be working -- we just test
- * whether bus 00 contains a host bridge (this is similar to checking
- * techniques used in XFree86, but ours should be more reliable since we
- * attempt to make use of direct access hints provided by the PCI BIOS).
- *
- * This should be close to trivial, but it isn't, because there are buggy
- * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID.
- */
-static int pci_sanity_check(const struct pci_bus_operations *o)
-{
- uint16_t class, vendor;
- unsigned bus;
- int devfn;
- struct bus pbus; /* Dummy device */
-#define PCI_CLASS_BRIDGE_HOST 0x0600
-#define PCI_CLASS_DISPLAY_VGA 0x0300
-#define PCI_VENDOR_ID_COMPAQ 0x0e11
-#define PCI_VENDOR_ID_INTEL 0x8086
-#define PCI_VENDOR_ID_MOTOROLA 0x1057
-
- for (bus = 0, devfn = 0; devfn < 0x100; devfn++) {
- class = o->read16(&pbus, bus, devfn, PCI_CLASS_DEVICE);
- vendor = o->read16(&pbus, bus, devfn, PCI_VENDOR_ID);
- if (((class == PCI_CLASS_BRIDGE_HOST) || (class == PCI_CLASS_DISPLAY_VGA)) ||
- ((vendor == PCI_VENDOR_ID_INTEL) || (vendor == PCI_VENDOR_ID_COMPAQ) ||
- (vendor == PCI_VENDOR_ID_MOTOROLA))) {
- return 1;
- }
- }
- printk(BIOS_ERR, "PCI: Sanity check failed\n");
- return 0;
-}
-
-static struct pci_bus_operations *pci_bus_fallback_ops = NULL;
-
-static const struct pci_bus_operations *pci_check_direct(void)
-{
- unsigned int tmp;
-
- /*
- * Check if configuration type 1 works.
- */
- {
- outb(0x01, 0xCFB);
- tmp = inl(0xCF8);
- outl(0x80000000, 0xCF8);
- if ((inl(0xCF8) == 0x80000000) &&
- pci_sanity_check(&pci_cf8_conf1))
- {
- outl(tmp, 0xCF8);
- printk(BIOS_DEBUG, "PCI: Using configuration type 1\n");
- return &pci_cf8_conf1;
- }
- outl(tmp, 0xCF8);
- }
-
- /*
- * Check if configuration type 2 works.
- */
- {
- outb(0x00, 0xCFB);
- outb(0x00, 0xCF8);
- outb(0x00, 0xCFA);
- if ((inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00) &&
- pci_sanity_check(&pci_cf8_conf2))
- {
- printk(BIOS_DEBUG, "PCI: Using configuration type 2\n");
- return &pci_cf8_conf2;
- }
- }
-
- die("pci_check_direct failed\n");
- return NULL;
-}
-
-const struct pci_bus_operations *pci_remember_direct(void)
-{
- if (!pci_bus_fallback_ops)
- pci_bus_fallback_ops = (struct pci_bus_operations *)pci_check_direct();
- return pci_bus_fallback_ops;
-}
-#else
-const struct pci_bus_operations *pci_remember_direct(void)
-{
- return &pci_cf8_conf1;
-}
-#endif
-
-/** Set the method to be used for PCI, type I or type II
- */
-void pci_set_method(device_t dev)
-{
- printk(BIOS_INFO, "Finding PCI configuration type.\n");
- dev->ops->ops_pci_bus = pci_remember_direct();
- post_code(0x5f);
-}
diff --git a/src/arch/x86/lib/pci_ops_conf2.c b/src/arch/x86/lib/pci_ops_conf2.c
deleted file mode 100644
index e89c933fc2..0000000000
--- a/src/arch/x86/lib/pci_ops_conf2.c
+++ /dev/null
@@ -1,80 +0,0 @@
-#include <console/console.h>
-#include <arch/io.h>
-#include <arch/pciconf.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-/*
- * Functions for accessing PCI configuration space with type 2 accesses
- */
-
-#define IOADDR(devfn, where) ((0xC000 | ((devfn & 0x78) << 5)) + where)
-#define FUNC(devfn) (((devfn & 7) << 1) | 0xf0)
-#define SET(bus,devfn) outb(FUNC(devfn), 0xCF8); outb(bus, 0xCFA);
-
-static uint8_t pci_conf2_read_config8(struct bus *pbus, int bus, int devfn,
- int where)
-{
- uint8_t value;
- SET(bus, devfn);
- value = inb(IOADDR(devfn, where));
- outb(0, 0xCF8);
- return value;
-}
-
-static uint16_t pci_conf2_read_config16(struct bus *pbus, int bus, int devfn,
- int where)
-{
- uint16_t value;
- SET(bus, devfn);
- value = inw(IOADDR(devfn, where));
- outb(0, 0xCF8);
- return value;
-}
-
-static uint32_t pci_conf2_read_config32(struct bus *pbus, int bus, int devfn,
- int where)
-{
- uint32_t value;
- SET(bus, devfn);
- value = inl(IOADDR(devfn, where));
- outb(0, 0xCF8);
- return value;
-}
-
-static void pci_conf2_write_config8(struct bus *pbus, int bus, int devfn,
- int where, uint8_t value)
-{
- SET(bus, devfn);
- outb(value, IOADDR(devfn, where));
- outb(0, 0xCF8);
-}
-
-static void pci_conf2_write_config16(struct bus *pbus, int bus, int devfn,
- int where, uint16_t value)
-{
- SET(bus, devfn);
- outw(value, IOADDR(devfn, where));
- outb(0, 0xCF8);
-}
-
-static void pci_conf2_write_config32(struct bus *pbus, int bus, int devfn,
- int where, uint32_t value)
-{
- SET(bus, devfn);
- outl(value, IOADDR(devfn, where));
- outb(0, 0xCF8);
-}
-
-#undef SET
-#undef IOADDR
-#undef FUNC
-
-const struct pci_bus_operations pci_cf8_conf2 = {
- .read8 = pci_conf2_read_config8,
- .read16 = pci_conf2_read_config16,
- .read32 = pci_conf2_read_config32,
- .write8 = pci_conf2_write_config8,
- .write16 = pci_conf2_write_config16,
- .write32 = pci_conf2_write_config32,
-};
diff --git a/src/devices/oprom/x86_interrupts.c b/src/devices/oprom/x86_interrupts.c
index bada546c90..2ea05d44ba 100644
--- a/src/devices/oprom/x86_interrupts.c
+++ b/src/devices/oprom/x86_interrupts.c
@@ -114,9 +114,7 @@ int int16_handler(struct eregs *regs)
}
#define PCI_CONFIG_SPACE_TYPE1 (1 << 0)
-#define PCI_CONFIG_SPACE_TYPE2 (1 << 1)
#define PCI_SPECIAL_CYCLE_TYPE1 (1 << 4)
-#define PCI_SPECIAL_CYCLE_TYPE2 (1 << 5)
int int1a_handler(struct eregs *regs)
{
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index e864d6d47f..51d52835fd 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -100,7 +100,7 @@ static inline const struct pci_bus_operations *ops_pci_bus(struct bus *bus)
bops = bus->dev->ops->ops_pci_bus;
}
if (!bops)
- bops = pci_remember_direct();
+ bops = pci_config_default();
return bops;
}
diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h
index e5e54b6d4d..2efbf9da49 100644
--- a/src/include/device/pci_ops.h
+++ b/src/include/device/pci_ops.h
@@ -21,7 +21,4 @@ void pci_mmio_write_config16(device_t dev, unsigned int where, u16 val);
void pci_mmio_write_config32(device_t dev, unsigned int where, u32 val);
#endif
-/* This function lives in pci_ops_auto.c */
-const struct pci_bus_operations *pci_remember_direct(void);
-
#endif /* PCI_OPS_H */