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-rw-r--r--src/cpu/x86/Kconfig8
-rw-r--r--src/cpu/x86/mp_init.c3
2 files changed, 11 insertions, 0 deletions
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index caee5dbd10..a8cf54d89e 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -155,6 +155,14 @@ config X86_AMD_FIXED_MTRRS
This option informs the MTRR code to use the RdMem and WrMem fields
in the fixed MTRR MSRs.
+config X86_AMD_INIT_SIPI
+ bool
+ default n
+ help
+ This option limits the number of SIPI signals sent during during the
+ common AP setup. Intel documentation specifies an INIT SIPI SIPI
+ sequence, however this doesn't work on some AMD platforms.
+
config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING
def_bool n
help
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index dbaf73fdfb..3658a5b698 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -482,6 +482,9 @@ static int start_aps(struct bus *cpu_bus, int ap_count, atomic_t *num_aps)
/* Wait for CPUs to check in up to 200 us. */
wait_for_aps(num_aps, ap_count, 200 /* us */, 15 /* us */);
+ if (CONFIG(X86_AMD_INIT_SIPI))
+ return 0;
+
/* Send 2nd SIPI */
if ((lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY)) {
printk(BIOS_DEBUG, "Waiting for ICR not to be busy...");