diff options
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/p2sb.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/p2sb.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/p2sb.h b/src/soc/intel/cannonlake/include/soc/p2sb.h index 1f209ed862..8b2e437f87 100644 --- a/src/soc/intel/cannonlake/include/soc/p2sb.h +++ b/src/soc/intel/cannonlake/include/soc/p2sb.h @@ -20,7 +20,7 @@ #define HPTC_ADDR_ENABLE_BIT (1 << 7) #define PCH_P2SB_EPMASK0 0x220 -#define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + (mask_number * 4)) +#define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + ((mask_number) * 4)) #define PCH_P2SB_E0 0xE0 diff --git a/src/soc/intel/skylake/include/soc/p2sb.h b/src/soc/intel/skylake/include/soc/p2sb.h index 36bb62d675..d846dfc8f5 100644 --- a/src/soc/intel/skylake/include/soc/p2sb.h +++ b/src/soc/intel/skylake/include/soc/p2sb.h @@ -20,7 +20,7 @@ #define HPTC_ADDR_ENABLE_BIT (1 << 7) #define PCH_P2SB_EPMASK0 0xB0 -#define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + (mask_number * 4)) +#define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + ((mask_number) * 4)) #define PCH_P2SB_E0 0xE0 #define PCH_PWRM_ACPI_TMR_CTL 0xFC |