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-rw-r--r--src/include/spi.h3
-rw-r--r--src/southbridge/intel/bd82x6x/spi.c6
2 files changed, 8 insertions, 1 deletions
diff --git a/src/include/spi.h b/src/include/spi.h
index bee851ea97..7d195d002a 100644
--- a/src/include/spi.h
+++ b/src/include/spi.h
@@ -44,6 +44,9 @@
#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */
#define SPI_XFER_END 0x02 /* Deassert CS after transfer */
+/* SPI opcodes */
+#define SPI_OPCODE_WREN 0x06
+
/*-----------------------------------------------------------------------
* Representation of a SPI slave, i.e. what we're communicating with.
*
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c
index 5903fd8cf4..2e88932c0b 100644
--- a/src/southbridge/intel/bd82x6x/spi.c
+++ b/src/southbridge/intel/bd82x6x/spi.c
@@ -505,6 +505,10 @@ static int spi_setup_opcode(spi_transaction *trans)
uint8_t optype;
uint16_t opcode_index;
+ /* Write Enable is handled as atomic prefix */
+ if (trans->opcode == SPI_OPCODE_WREN)
+ return 0;
+
read_reg(cntlr.opmenu, opmenu, sizeof(opmenu));
for (opcode_index = 0; opcode_index < cntlr.menubytes;
opcode_index++) {
@@ -623,7 +627,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
if ((with_address = spi_setup_offset(&trans)) < 0)
return -1;
- if (!ichspi_lock && trans.opcode == 0x06) {
+ if (!ichspi_lock && trans.opcode == SPI_OPCODE_WREN) {
/*
* Treat Write Enable as Atomic Pre-Op if possible
* in order to prevent the Management Engine from