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-rw-r--r--src/southbridge/amd/rs690/gfx.c7
-rw-r--r--src/southbridge/amd/rs690/ht.c7
2 files changed, 12 insertions, 2 deletions
diff --git a/src/southbridge/amd/rs690/gfx.c b/src/southbridge/amd/rs690/gfx.c
index c55f2bc3d3..175ea71991 100644
--- a/src/southbridge/amd/rs690/gfx.c
+++ b/src/southbridge/amd/rs690/gfx.c
@@ -193,8 +193,13 @@ static void rs690_internal_gfx_enable(device_t dev)
/* TODO: the optimization of voltage and frequency */
}
+static void gfx_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
+{
+ pci_write_config32(dev, 0x4c, ((device & 0xffff) << 16) | (vendor & 0xffff));
+}
+
static struct pci_operations lops_pci = {
- .set_subsystem = pci_dev_set_subsystem,
+ .set_subsystem = gfx_dev_set_subsystem,
};
static struct device_operations pcie_ops = {
diff --git a/src/southbridge/amd/rs690/ht.c b/src/southbridge/amd/rs690/ht.c
index 26824b5322..67a471626c 100644
--- a/src/southbridge/amd/rs690/ht.c
+++ b/src/southbridge/amd/rs690/ht.c
@@ -70,8 +70,13 @@ static void pcie_init(struct device *dev)
pci_write_config32(dev, 0x4C, dword);
}
+static void ht_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
+{
+ pci_write_config32(dev, 0x50, ((device & 0xffff) << 16) | (vendor & 0xffff));
+}
+
static struct pci_operations lops_pci = {
- .set_subsystem = pci_dev_set_subsystem,
+ .set_subsystem = ht_dev_set_subsystem,
};
static struct device_operations ht_ops = {