diff options
| -rw-r--r-- | targets/tyan/s2882/Config.lb | 266 | ||||
| -rw-r--r-- | targets/tyan/s2882/VERSION | 1 | ||||
| -rw-r--r-- | targets/tyan/s2882/ns2882 | 8 | ||||
| -rw-r--r-- | targets/tyan/s2885/Config.lb | 266 | ||||
| -rw-r--r-- | targets/tyan/s2885/VERSION | 1 | ||||
| -rw-r--r-- | targets/tyan/s2885/ns2885 | 6 |
6 files changed, 548 insertions, 0 deletions
diff --git a/targets/tyan/s2882/Config.lb b/targets/tyan/s2882/Config.lb new file mode 100644 index 0000000000..5842babc5c --- /dev/null +++ b/targets/tyan/s2882/Config.lb @@ -0,0 +1,266 @@ +# Sample config file for +# the Tyan s2880 +# This will make a target directory of ./s2880 + +loadoptions + +target s2882 + +uses AMD8111_DEV +uses ARCH +uses CONFIG_COMPRESS +uses CONFIG_IOAPIC +uses CONFIG_ROM_STREAM +uses CONFIG_ROM_STREAM_START +uses CONFIG_SMP +uses CONFIG_UDELAY_TSC +uses CPU_FIXUP +uses ENABLE_FIXED_AND_VARIABLE_MTRRS +uses FALLBACK_SIZE +uses FINAL_MAINBOARD_FIXUP +uses HAVE_FALLBACK_BOOT +uses HAVE_MP_TABLE +uses HAVE_PIRQ_TABLE +uses i586 +uses i686 +uses INTEL_PPRO_MTRR +uses HEAP_SIZE +uses IRQ_SLOT_COUNT +uses k7 +uses k8 +uses MAINBOARD +uses MAINBOARD_PART_NUMBER +uses MAINBOARD_VENDOR +uses MAX_CPUS +#uses MEMORY_HOLE +uses PAYLOAD_SIZE +uses _RAMBASE +uses _ROMBASE +uses ROM_IMAGE_SIZE +uses ROM_SECTION_OFFSET +uses ROM_SECTION_SIZE +uses ROM_SIZE +uses SIO_BASE +uses SIO_SYSTEM_CLK_INPUT +uses STACK_SIZE +uses USE_ELF_BOOT +uses USE_FALLBACK_IMAGE +uses USE_NORMAL_IMAGE +uses USE_OPTION_TABLE +uses HAVE_OPTION_TABLE +uses CONFIG_CHIP_CONFIGURE + +uses CONFIG_CONSOLE_SERIAL8250 +uses TTYS0_BAUD +uses DEFAULT_CONSOLE_LOGLEVEL +uses MAXIMUM_CONSOLE_LOGLEVEL +uses DEBUG +uses CONFIG_MAX_CPUS +uses CONFIG_LOGICAL_CPUS +uses MAX_PHYSICAL_CPUS +uses LINUXBIOS_EXTRA_VERSION +uses XIP_ROM_SIZE +uses XIP_ROM_BASE + +uses CONFIG_VGABIOS +uses CONFIG_REALMODE_IDT +uses CONFIG_PCIBIOS +uses VGABIOS_START +uses SCSIFW_START + +# +#uses CONFIG_LSI_SCSI_FW_FIXUP + +option HAVE_OPTION_TABLE=1 +option HAVE_MP_TABLE=1 +option CPU_FIXUP=1 +option CONFIG_UDELAY_TSC=0 +option i686=1 +option i586=1 +option INTEL_PPRO_MTRR=1 +option k7=1 +option k8=1 +option ROM_SIZE=524288 + +#option CONFIG_VGABIOS=1 +#option CONFIG_REALMODE_IDT=1 +#option CONFIG_PCIBIOS=1 +#option VGABIOS_START=0xfff8c000 +option SCSIFW_START=0xfff80000 + + +option HAVE_FALLBACK_BOOT=1 + +# use the new chip configure code. + +option CONFIG_CHIP_CONFIGURE=1 +#option CONFIG_LSI_SCSI_FW_FIXUP=1 + + +### Customize our winbond superio chip for this motherboard +### +option SIO_BASE=0x2e +option SIO_SYSTEM_CLK_INPUT=0 +# +### +### Build code to export a programmable irq routing table +### +option HAVE_PIRQ_TABLE=1 +option IRQ_SLOT_COUNT=15 +# +### +### Build code for SMP support +### Only worry about 2 micro processors +### +option CONFIG_SMP=1 +option CONFIG_MAX_CPUS=2 +option MAX_CPUS=2 +option CONFIG_LOGICAL_CPUS=0 +option MAX_PHYSICAL_CPUS=2 +# +### +### Build code to setup a generic IOAPIC +### +option CONFIG_IOAPIC=1 +# +### +### MEMORY_HOLE instructs earlymtrr.inc to +### enable caching from 0-640KB and to disable +### caching from 640KB-1MB using fixed MTRRs +### +### Enabling this option breaks SMP because secondary +### CPU identification depends on only variable MTRRs +### being enabled. +### +#option MEMORY_HOLE=0 +# +### +### Enable both fixed and variable MTRRS +### When we setup MTRRs in mtrr.c +### +### We must setup the fixed mtrrs or we confuse SMP secondary +### processor identification +### +option ENABLE_FIXED_AND_VARIABLE_MTRRS=1 +# +### +### Clean up the motherboard id strings +### +option MAINBOARD_PART_NUMBER="S2882" +option MAINBOARD_VENDOR="Tyan" +# +### +### Call the final_mainboard_fixup function +### +option FINAL_MAINBOARD_FIXUP=1 + +### +### Compute the location and size of where this firmware image +### (linuxBIOS plus bootloader) will live in the boot rom chip. +### +#option FALLBACK_SIZE=524288 +option FALLBACK_SIZE=98304 + +## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. +option ROM_IMAGE_SIZE=65536 + + +### +### Compute where this copy of linuxBIOS will start in the boot rom +### +# +### + +## We do use compressed image +option CONFIG_COMPRESS=1 + +option USE_ELF_BOOT=1 + + +option CONFIG_CONSOLE_SERIAL8250=1 +option TTYS0_BAUD=115200 + +## +### Select the linuxBIOS loglevel +## +## EMERG 1 system is unusable +## ALERT 2 action must be taken immediately +## CRIT 3 critical conditions +## ERR 4 error conditions +## WARNING 5 warning conditions +## NOTICE 6 normal but significant condition +## INFO 7 informational +## DEBUG 8 debug-level messages +## SPEW 9 Way too many details + +## Request this level of debugging output +option DEFAULT_CONSOLE_LOGLEVEL=8 +## At a maximum only compile in this level of debugging +option MAXIMUM_CONSOLE_LOGLEVEL=9 + +option DEBUG=1 + +option AMD8111_DEV=0x5 + +# + +## LinuxBIOS C code runs at this location in RAM +option _RAMBASE=0x004000 + +## +## Use a 64K stack +## +option STACK_SIZE=0x2000 + +## +## Use a 64K heap +## +option HEAP_SIZE=0x2000 + +# +### +### Compute the start location and size size of +### The linuxBIOS bootloader. +### +option CONFIG_ROM_STREAM = 1 + +# +# +romimage "normal" +# 48K for SCSI FW +# option ROM_SIZE = 475136 +# 48K for SCSI FW and 48K for ATI ROM +# option ROM_SIZE = 425984 + option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) + option ROM_SECTION_OFFSET= 0 + + option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) + option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE) + + option XIP_ROM_SIZE = FALLBACK_SIZE + option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) + + mainboard tyan/s2882 + payload ../../tg3--ide_disk.zelf +end + +romimage "fallback" + option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option USE_FALLBACK_IMAGE=1 + option ROM_SECTION_SIZE = FALLBACK_SIZE + option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE) + + option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) + option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE) + + option XIP_ROM_SIZE = FALLBACK_SIZE + option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) + + mainboard tyan/s2882 + payload ../../tg3.zelf +end + +buildrom ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2882/VERSION b/targets/tyan/s2882/VERSION new file mode 100644 index 0000000000..cd5ac039d6 --- /dev/null +++ b/targets/tyan/s2882/VERSION @@ -0,0 +1 @@ +2.0 diff --git a/targets/tyan/s2882/ns2882 b/targets/tyan/s2882/ns2882 new file mode 100644 index 0000000000..886da76b51 --- /dev/null +++ b/targets/tyan/s2882/ns2882 @@ -0,0 +1,8 @@ +#!/bin/bash +TYANMB=s2882 +cd "$TYANMB" +make +#cat ../fwx.rom ../atix.rom ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom" +#cat ../fwx.rom ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom" +cat ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom" +cp -f $TYANMB"_linuxbios.rom" /home/yhlu/ diff --git a/targets/tyan/s2885/Config.lb b/targets/tyan/s2885/Config.lb new file mode 100644 index 0000000000..9f0e179874 --- /dev/null +++ b/targets/tyan/s2885/Config.lb @@ -0,0 +1,266 @@ +# Sample config file for +# the Tyan s2885 +# This will make a target directory of ./s2885 + +loadoptions + +target s2885 + +uses AMD8111_DEV +uses ARCH +uses CONFIG_COMPRESS +uses CONFIG_IOAPIC +uses CONFIG_ROM_STREAM +uses CONFIG_ROM_STREAM_START +uses CONFIG_SMP +uses CONFIG_UDELAY_TSC +uses CPU_FIXUP +uses ENABLE_FIXED_AND_VARIABLE_MTRRS +uses FALLBACK_SIZE +uses FINAL_MAINBOARD_FIXUP +uses HAVE_FALLBACK_BOOT +uses HAVE_MP_TABLE +uses HAVE_PIRQ_TABLE +uses i586 +uses i686 +uses INTEL_PPRO_MTRR +uses HEAP_SIZE +uses IRQ_SLOT_COUNT +uses k7 +uses k8 +uses MAINBOARD +uses MAINBOARD_PART_NUMBER +uses MAINBOARD_VENDOR +uses MAX_CPUS +#uses MEMORY_HOLE +uses PAYLOAD_SIZE +uses _RAMBASE +uses _ROMBASE +uses ROM_IMAGE_SIZE +uses ROM_SECTION_OFFSET +uses ROM_SECTION_SIZE +uses ROM_SIZE +uses SIO_BASE +uses SIO_SYSTEM_CLK_INPUT +uses STACK_SIZE +uses USE_ELF_BOOT +uses USE_FALLBACK_IMAGE +uses USE_NORMAL_IMAGE +uses USE_OPTION_TABLE +uses HAVE_OPTION_TABLE +uses CONFIG_CHIP_CONFIGURE + +uses CONFIG_CONSOLE_SERIAL8250 +uses TTYS0_BAUD +uses DEFAULT_CONSOLE_LOGLEVEL +uses MAXIMUM_CONSOLE_LOGLEVEL +uses DEBUG +uses CONFIG_MAX_CPUS +uses CONFIG_LOGICAL_CPUS +uses MAX_PHYSICAL_CPUS +uses LINUXBIOS_EXTRA_VERSION +uses XIP_ROM_SIZE +uses XIP_ROM_BASE + +#uses CONFIG_VGABIOS +#uses CONFIG_REALMODE_IDT +#uses CONFIG_PCIBIOS +#uses VGABIOS_START +#uses SCSIFW_START + +# +#uses CONFIG_LSI_SCSI_FW_FIXUP + +option HAVE_OPTION_TABLE=1 +option HAVE_MP_TABLE=1 +option CPU_FIXUP=1 +option CONFIG_UDELAY_TSC=0 +option i686=1 +option i586=1 +option INTEL_PPRO_MTRR=1 +option k7=1 +option k8=1 +option ROM_SIZE=524288 + +#option CONFIG_VGABIOS=1 +#option CONFIG_REALMODE_IDT=1 +#option CONFIG_PCIBIOS=1 +#option VGABIOS_START=0xfff8c000 +#option SCSIFW_START=0xfff80000 + + +option HAVE_FALLBACK_BOOT=1 + +# use the new chip configure code. + +option CONFIG_CHIP_CONFIGURE=1 +#option CONFIG_LSI_SCSI_FW_FIXUP=1 + + +### Customize our winbond superio chip for this motherboard +### +option SIO_BASE=0x2e +option SIO_SYSTEM_CLK_INPUT=0 +# +### +### Build code to export a programmable irq routing table +### +option HAVE_PIRQ_TABLE=1 +option IRQ_SLOT_COUNT=11 +# +### +### Build code for SMP support +### Only worry about 2 micro processors +### +option CONFIG_SMP=1 +option CONFIG_MAX_CPUS=2 +option MAX_CPUS=2 +option CONFIG_LOGICAL_CPUS=0 +option MAX_PHYSICAL_CPUS=2 +# +### +### Build code to setup a generic IOAPIC +### +option CONFIG_IOAPIC=1 +# +### +### MEMORY_HOLE instructs earlymtrr.inc to +### enable caching from 0-640KB and to disable +### caching from 640KB-1MB using fixed MTRRs +### +### Enabling this option breaks SMP because secondary +### CPU identification depends on only variable MTRRs +### being enabled. +### +#option MEMORY_HOLE=0 +# +### +### Enable both fixed and variable MTRRS +### When we setup MTRRs in mtrr.c +### +### We must setup the fixed mtrrs or we confuse SMP secondary +### processor identification +### +option ENABLE_FIXED_AND_VARIABLE_MTRRS=1 +# +### +### Clean up the motherboard id strings +### +option MAINBOARD_PART_NUMBER="S2885" +option MAINBOARD_VENDOR="Tyan" +# +### +### Call the final_mainboard_fixup function +### +option FINAL_MAINBOARD_FIXUP=1 + +### +### Compute the location and size of where this firmware image +### (linuxBIOS plus bootloader) will live in the boot rom chip. +### +#option FALLBACK_SIZE=524288 +option FALLBACK_SIZE=98304 + +## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. +option ROM_IMAGE_SIZE=65536 + + +### +### Compute where this copy of linuxBIOS will start in the boot rom +### +# +### + +## We do use compressed image +option CONFIG_COMPRESS=1 + +option USE_ELF_BOOT=1 + + +option CONFIG_CONSOLE_SERIAL8250=1 +option TTYS0_BAUD=115200 + +## +### Select the linuxBIOS loglevel +## +## EMERG 1 system is unusable +## ALERT 2 action must be taken immediately +## CRIT 3 critical conditions +## ERR 4 error conditions +## WARNING 5 warning conditions +## NOTICE 6 normal but significant condition +## INFO 7 informational +## DEBUG 8 debug-level messages +## SPEW 9 Way too many details + +## Request this level of debugging output +option DEFAULT_CONSOLE_LOGLEVEL=8 +## At a maximum only compile in this level of debugging +option MAXIMUM_CONSOLE_LOGLEVEL=9 + +option DEBUG=1 + +option AMD8111_DEV=0x5 + +# + +## LinuxBIOS C code runs at this location in RAM +option _RAMBASE=0x004000 + +## +## Use a 64K stack +## +option STACK_SIZE=0x2000 + +## +## Use a 64K heap +## +option HEAP_SIZE=0x2000 + +# +### +### Compute the start location and size size of +### The linuxBIOS bootloader. +### +option CONFIG_ROM_STREAM = 1 + +# +# +romimage "normal" +# 48K for SCSI FW +# option ROM_SIZE = 475136 +# 48K for SCSI FW and 48K for ATI ROM +# option ROM_SIZE = 425984 + option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) + option ROM_SECTION_OFFSET= 0 + + option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) + option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE) + + option XIP_ROM_SIZE = FALLBACK_SIZE + option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) + + mainboard tyan/s2885 + payload ../../tg3--ide_disk.zelf +end + +romimage "fallback" + option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option USE_FALLBACK_IMAGE=1 + option ROM_SECTION_SIZE = FALLBACK_SIZE + option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE) + + option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) + option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE) + + option XIP_ROM_SIZE = FALLBACK_SIZE + option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) + + mainboard tyan/s2885 + payload ../../tg3.zelf +end + +buildrom ROM_SIZE "normal" "fallback" diff --git a/targets/tyan/s2885/VERSION b/targets/tyan/s2885/VERSION new file mode 100644 index 0000000000..cd5ac039d6 --- /dev/null +++ b/targets/tyan/s2885/VERSION @@ -0,0 +1 @@ +2.0 diff --git a/targets/tyan/s2885/ns2885 b/targets/tyan/s2885/ns2885 new file mode 100644 index 0000000000..58f6aaf2e0 --- /dev/null +++ b/targets/tyan/s2885/ns2885 @@ -0,0 +1,6 @@ +#!/bin/bash +TYANMB=s2885 +cd "$TYANMB" +make +cat ./normal/linuxbios.rom ./fallback/linuxbios.rom > $TYANMB"_linuxbios.rom" +cp -f $TYANMB"_linuxbios.rom" /home/yhlu/ |