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-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c56
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h5
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mndct.c49
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h5
4 files changed, 0 insertions, 115 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c
index 00024e2fa4..724202b663 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c
@@ -1933,62 +1933,6 @@ MemNChangeFrequencyUnb (
}
}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- * This function calculates and programs NB P-state dependent registers
- *
- * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemNProgramNbPstateDependentRegistersUnb (
- IN OUT MEM_NB_BLOCK *NBPtr
- )
-{
- UINT8 RdPtrInit;
- UINT8 Dct;
-
- RdPtrInit = (NBPtr->DCTPtr->Timings.Speed <= DDR1600_FREQUENCY) ? 6 : 5;
- MemNBrdcstSetNb (NBPtr, BFRdPtrInit, RdPtrInit);
- IDS_HDT_CONSOLE (MEM_FLOW, "\t\tRdPtr: %d\n", RdPtrInit);
-
- switch (RdPtrInit) {
- case 4:
- if (MemNGetBitFieldNb (NBPtr, BFNbPsSel) == 0) {
- MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 2);
- } else {
- MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 1);
- }
- break;
- case 5:
- MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 1);
- break;
- case 6:
- MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 0);
- break;
- default:
- ASSERT (FALSE);
- }
-
- for (Dct = 0; Dct < NBPtr->DctCount; Dct++) {
- MemNSwitchDCTNb (NBPtr, Dct);
- if (NBPtr->DCTPtr->Timings.DctMemSize != 0) {
- // Set ProcOdtAdv
- if (NBPtr->DCTPtr->Timings.Speed <= DDR1333_FREQUENCY) {
- MemNSetBitFieldNb (NBPtr, BFProcOdtAdv, 0);
- } else {
- MemNSetBitFieldNb (NBPtr, BFProcOdtAdv, 0x4000);
- }
- }
- }
-
- NBPtr->FamilySpecificHook[OverrideDataTxFifoWrDly] (NBPtr, NBPtr);
- IDS_OPTION_HOOK (IDS_NBPS_REG_OVERRIDE, NBPtr, &NBPtr->MemPtr->StdHeader);
-}
-
/* -----------------------------------------------------------------------------*/
CONST UINT8 PllDivTab[] = {0, 0, 0, 2, 3, 3, 2, 3};
CONST UINT8 PllMultTab[] = {0, 0, 0, 16, 32, 40, 32, 56};
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h b/src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h
index e25c9389f0..a17906a448 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/mn.h
@@ -1186,11 +1186,6 @@ MemNChangeFrequencyUnb (
);
VOID
-MemNProgramNbPstateDependentRegistersUnb (
- IN OUT MEM_NB_BLOCK *NBPtr
- );
-
-VOID
MemNProgramNbPstateDependentRegistersClientNb (
IN OUT MEM_NB_BLOCK *NBPtr
);
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mndct.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mndct.c
index a3b5d764d1..6aa4868b7f 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mndct.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mndct.c
@@ -2310,55 +2310,6 @@ MemNChangeFrequencyUnb (
MemFInitTableDrive (NBPtr, MTAfterFreqChg);
}
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- * This function calculates and programs NB P-state dependent registers
- *
- * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemNProgramNbPstateDependentRegistersUnb (
- IN OUT MEM_NB_BLOCK *NBPtr
- )
-{
- UINT8 RdPtrInit;
-
- RdPtrInit = (NBPtr->DCTPtr->Timings.Speed <= DDR1600_FREQUENCY) ? 6 : 4;
- MemNBrdcstSetNb (NBPtr, BFRdPtrInit, RdPtrInit);
- IDS_HDT_CONSOLE (MEM_FLOW, "\t\tRdPtr: %d\n", RdPtrInit);
-
- MemFInitTableDrive (NBPtr, MTAfterNbPstateChange);
-
- IDS_HDT_CONSOLE_DEBUG_CODE (
- RdPtrInit = (UINT8) MemNGetBitFieldNb (NBPtr, BFRdPtrInit);
- );
-
- switch (RdPtrInit) {
- case 4:
- if (MemNGetBitFieldNb (NBPtr, BFNbPsSel) == 0) {
- MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 2);
- } else {
- MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 1);
- }
- break;
- case 5:
- MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 1);
- break;
- case 6:
- MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 0);
- break;
- default:
- ASSERT (FALSE);
- }
-
- NBPtr->FamilySpecificHook[OverrideDataTxFifoWrDly] (NBPtr, NBPtr);
- IDS_OPTION_HOOK (IDS_NBPS_REG_OVERRIDE, NBPtr, &NBPtr->MemPtr->StdHeader);
-}
-
/* -----------------------------------------------------------------------------*/
CONST UINT8 PllDivTab[] = {0, 0, 0, 2, 3, 3, 2, 3};
CONST UINT8 PllMultTab[] = {0, 0, 0, 16, 32, 40, 32, 56};
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h
index 4be78a30fe..c09e2beff7 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h
@@ -1290,11 +1290,6 @@ MemNChangeFrequencyUnb (
);
VOID
-MemNProgramNbPstateDependentRegistersUnb (
- IN OUT MEM_NB_BLOCK *NBPtr
- );
-
-VOID
MemNProgramNbPstateDependentRegistersClientNb (
IN OUT MEM_NB_BLOCK *NBPtr
);