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-rw-r--r--src/mainboard/google/foster/pmic.c4
-rw-r--r--src/mainboard/google/smaug/pmic.c4
-rw-r--r--src/soc/nvidia/tegra210/Makefile.inc3
-rw-r--r--src/soc/nvidia/tegra210/reset.c25
4 files changed, 4 insertions, 32 deletions
diff --git a/src/mainboard/google/foster/pmic.c b/src/mainboard/google/foster/pmic.c
index 2e655b59f3..2eeccb2241 100644
--- a/src/mainboard/google/foster/pmic.c
+++ b/src/mainboard/google/foster/pmic.c
@@ -43,8 +43,8 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay)
if (i2c_writeb(bus, MAX77620_I2C_ADDR, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
__func__, reg, val);
- /* Reset the SoC on any PMIC write error */
- cpu_reset();
+ /* Reset the board on any PMIC write error */
+ hard_reset();
} else {
if (delay)
udelay(500);
diff --git a/src/mainboard/google/smaug/pmic.c b/src/mainboard/google/smaug/pmic.c
index cba555a5e7..25e870a123 100644
--- a/src/mainboard/google/smaug/pmic.c
+++ b/src/mainboard/google/smaug/pmic.c
@@ -46,8 +46,8 @@ static void pmic_write_reg(unsigned bus, uint8_t chip, uint8_t reg, uint8_t val,
if (i2c_writeb(bus, chip, reg, val)) {
printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
__func__, reg, val);
- /* Reset the SoC on any PMIC write error */
- cpu_reset();
+ /* Reset the board on any PMIC write error */
+ hard_reset();
} else {
if (delay)
udelay(500);
diff --git a/src/soc/nvidia/tegra210/Makefile.inc b/src/soc/nvidia/tegra210/Makefile.inc
index 756d4137e6..a2b50c96c2 100644
--- a/src/soc/nvidia/tegra210/Makefile.inc
+++ b/src/soc/nvidia/tegra210/Makefile.inc
@@ -12,7 +12,6 @@ bootblock-y += monotonic_timer.c
bootblock-y += padconfig.c
bootblock-y += power.c
bootblock-y += funitcfg.c
-bootblock-y += reset.c
bootblock-y += ../tegra/gpio.c
bootblock-y += ../tegra/i2c.c
bootblock-y += ../tegra/pingroup.c
@@ -41,7 +40,6 @@ romstage-y += cbmem.c
romstage-y += ccplex.c
romstage-y += clock.c
romstage-y += cpu.c
-romstage-y += reset.c
romstage-y += spi.c
romstage-y += i2c.c
romstage-y += dma.c
@@ -87,7 +85,6 @@ ramstage-y += gic.c
ramstage-y += monotonic_timer.c
ramstage-y += padconfig.c
ramstage-y += funitcfg.c
-ramstage-y += reset.c
ramstage-y += ram_code.c
ramstage-y += ../tegra/apbmisc.c
ramstage-y += ../tegra/gpio.c
diff --git a/src/soc/nvidia/tegra210/reset.c b/src/soc/nvidia/tegra210/reset.c
deleted file mode 100644
index 38a97d82cb..0000000000
--- a/src/soc/nvidia/tegra210/reset.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <reset.h>
-
-/*
- * Promote cpu_reset() to a hard_reset(). A shallower reset can be added,
- * if needed, at a later time.
- */
-void cpu_reset(void)
-{
- hard_reset();
-}