diff options
| -rw-r--r-- | src/soc/intel/skylake/chip.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 07cb8b1669..2e4adb2a6e 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -205,6 +205,7 @@ struct soc_intel_skylake_config { /* Camera */ u8 Cio2Enable; + u8 SaImguEnable; /* eMMC and SD */ u8 ScsEmmcEnabled; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 2b50d0c85b..8b8c37c031 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -174,6 +174,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) sizeof(params->SerialIoDevMode)); params->PchCio2Enable = config->Cio2Enable; + params->SaImguEnable = config->SaImguEnable; params->Heci3Enabled = config->Heci3Enabled; params->LogoPtr = config->LogoPtr; @@ -186,7 +187,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PchPmLanWakeFromDeepSx = config->WakeConfigPcieWakeFromDeepSx; params->PchLanEnable = config->EnableLan; - params->PchCio2Enable = config->Cio2Enable; params->SataSalpSupport = config->SataSalpSupport; params->SsicPortEnable = config->SsicPortEnable; params->ScsEmmcEnabled = config->ScsEmmcEnabled; |