diff options
| -rw-r--r-- | src/soc/amd/cezanne/fsp_m_params.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c index 4aff7e09bb..5dd3056f0c 100644 --- a/src/soc/amd/cezanne/fsp_m_params.c +++ b/src/soc/amd/cezanne/fsp_m_params.c @@ -8,10 +8,34 @@ #include <device/device.h> #include <fsp/api.h> #include <soc/platform_descriptors.h> +#include <soc/pci_devs.h> #include <string.h> #include <types.h> #include "chip.h" +static const struct device_path gfx_hda_path[] = { + { + .type = DEVICE_PATH_PCI, + .pci.devfn = PCIE_ABC_A_DEVFN + }, + { + .type = DEVICE_PATH_PCI, + .pci.devfn = GFX_HDA_DEVFN + }, +}; + +static bool devtree_gfx_hda_dev_enabled(void) +{ + const struct device *gfx_hda_dev; + + gfx_hda_dev = find_dev_nested_path(pci_root_bus(), gfx_hda_path, + ARRAY_SIZE(gfx_hda_path)); + if (!gfx_hda_dev) + return false; + + return gfx_hda_dev->enabled; +} + static void fill_dxio_descriptors(FSP_M_CONFIG *mcfg, const fsp_dxio_descriptor *descs, size_t num) { @@ -136,6 +160,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) mcfg->telemetry_vddcrsocOffset = config->telemetry_vddcrsocoffset; + mcfg->enable_nb_azalia = devtree_gfx_hda_dev_enabled(); + fsp_fill_pcie_ddi_descriptors(mcfg); fsp_assign_ioapic_upds(mcfg); } |