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-rw-r--r--src/arch/x86/car.ld2
-rw-r--r--src/device/device_const.c2
-rw-r--r--src/drivers/pc80/rtc/option.c2
-rw-r--r--src/ec/google/chromeec/ec.c2
-rw-r--r--src/ec/google/chromeec/ec_lpc.c2
-rw-r--r--src/include/rules.h3
-rw-r--r--src/include/stddef.h6
-rw-r--r--src/lib/imd_cbmem.c2
-rw-r--r--src/lib/lzma.c2
-rw-r--r--src/lib/program.ld2
-rw-r--r--src/mainboard/google/stout/chromeos.c4
-rw-r--r--src/security/tpm/tspi/log.c4
-rw-r--r--src/soc/intel/baytrail/northcluster.c2
-rw-r--r--src/soc/intel/braswell/northcluster.c2
-rw-r--r--toolchain.inc2
15 files changed, 14 insertions, 25 deletions
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index 0ea40d0083..ddd4e7a2bf 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -62,13 +62,11 @@
. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_bss = .;
-#if ENV_STAGE_HAS_BSS_SECTION
/* Allow global uninitialized variables for stages without CAR teardown. */
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
-#endif
. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_ebss = .;
_car_unallocated_start = .;
diff --git a/src/device/device_const.c b/src/device/device_const.c
index 3ad00f8838..12d5386d22 100644
--- a/src/device/device_const.c
+++ b/src/device/device_const.c
@@ -227,7 +227,7 @@ DEVTREE_CONST struct device *pcidev_path_on_bus(unsigned int bus, pci_devfn_t de
DEVTREE_CONST struct bus *pci_root_bus(void)
{
DEVTREE_CONST struct device *pci_domain;
- MAYBE_STATIC_BSS DEVTREE_CONST struct bus *pci_root = NULL;
+ static DEVTREE_CONST struct bus *pci_root;
if (pci_root)
return pci_root;
diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
index 5815e7c239..0a73cb3232 100644
--- a/src/drivers/pc80/rtc/option.c
+++ b/src/drivers/pc80/rtc/option.c
@@ -52,7 +52,7 @@ static enum cb_err get_cmos_value(unsigned long bit, unsigned long length,
static enum cb_err locate_cmos_layout(struct region_device *rdev)
{
uint32_t cbfs_type = CBFS_COMPONENT_CMOS_LAYOUT;
- MAYBE_STATIC_BSS struct cbfsf fh = {};
+ static struct cbfsf fh;
/*
* In case VBOOT is enabled and this function is called from SMM,
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index b96458152d..034e9313c9 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -1343,7 +1343,7 @@ static void google_chromeec_log_uptimeinfo(void)
/* Cache and retrieve the EC image type (ro or rw) */
enum ec_image google_chromeec_get_current_image(void)
{
- MAYBE_STATIC_BSS enum ec_image ec_image_type = EC_IMAGE_UNKNOWN;
+ static enum ec_image ec_image_type = EC_IMAGE_UNKNOWN;
if (ec_image_type != EC_IMAGE_UNKNOWN)
return ec_image_type;
diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c
index 52b5e6469b..5306dcca5b 100644
--- a/src/ec/google/chromeec/ec_lpc.c
+++ b/src/ec/google/chromeec/ec_lpc.c
@@ -387,7 +387,7 @@ void google_chromeec_ioport_range(uint16_t *out_base, size_t *out_size)
int google_chromeec_command(struct chromeec_command *cec_command)
{
- MAYBE_STATIC_BSS int command_version = 0;
+ static int command_version;
if (command_version <= 0)
command_version = google_chromeec_command_version();
diff --git a/src/include/rules.h b/src/include/rules.h
index 6af25a9577..614f37ad52 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -252,12 +252,9 @@
#define ENV_CACHE_AS_RAM (ENV_ROMSTAGE_OR_BEFORE && !CONFIG(RESET_VECTOR_IN_RAM))
/* No .data sections with execute-in-place from ROM. */
#define ENV_STAGE_HAS_DATA_SECTION !ENV_CACHE_AS_RAM
-/* No .bss sections for stage with CAR teardown. */
-#define ENV_STAGE_HAS_BSS_SECTION 1
#else
/* Both .data and .bss, sometimes SRAM not DRAM. */
#define ENV_STAGE_HAS_DATA_SECTION 1
-#define ENV_STAGE_HAS_BSS_SECTION 1
#define ENV_CACHE_AS_RAM 0
#endif
diff --git a/src/include/stddef.h b/src/include/stddef.h
index e3183096a0..b668b1aeb6 100644
--- a/src/include/stddef.h
+++ b/src/include/stddef.h
@@ -41,12 +41,6 @@ typedef unsigned int wint_t;
#define MAYBE_STATIC_NONZERO
#endif
-#if ENV_STAGE_HAS_BSS_SECTION
-#define MAYBE_STATIC_BSS static
-#else
-#define MAYBE_STATIC_BSS
-#endif
-
/* Provide a pointer to address 0 that thwarts any "accessing this is
* undefined behaviour and do whatever" trickery in compilers.
* Use when you _really_ need to read32(zeroptr) (ie. read address 0).
diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c
index 2f065ff7d2..d06a9e9416 100644
--- a/src/lib/imd_cbmem.c
+++ b/src/lib/imd_cbmem.c
@@ -19,7 +19,7 @@ static struct imd imd;
void *cbmem_top(void)
{
if (ENV_ROMSTAGE) {
- MAYBE_STATIC_BSS void *top = NULL;
+ static void *top;
if (top)
return top;
top = cbmem_top_chipset();
diff --git a/src/lib/lzma.c b/src/lib/lzma.c
index 16b6e228fb..d2e3e4b45d 100644
--- a/src/lib/lzma.c
+++ b/src/lib/lzma.c
@@ -26,7 +26,7 @@ size_t ulzman(const void *src, size_t srcn, void *dst, size_t dstn)
int res;
CLzmaDecoderState state;
SizeT mallocneeds;
- MAYBE_STATIC_BSS unsigned char scratchpad[15980];
+ static unsigned char scratchpad[15980];
const unsigned char *cp;
if (srcn < data_offset) {
diff --git a/src/lib/program.ld b/src/lib/program.ld
index b56a400ceb..734f040fcd 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -112,7 +112,7 @@
}
#endif
-#if ENV_STAGE_HAS_BSS_SECTION && !ENV_CACHE_AS_RAM
+#if !ENV_CACHE_AS_RAM
.bss . : {
. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_bss = .;
diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c
index b67762e13b..dfab358abc 100644
--- a/src/mainboard/google/stout/chromeos.c
+++ b/src/mainboard/google/stout/chromeos.c
@@ -53,8 +53,8 @@ int get_lid_switch(void)
*/
int get_recovery_mode_switch(void)
{
- MAYBE_STATIC_BSS int ec_in_rec_mode = 0;
- MAYBE_STATIC_BSS int ec_rec_flag_good = 0;
+ static int ec_in_rec_mode;
+ static int ec_rec_flag_good;
if (ec_rec_flag_good)
return ec_in_rec_mode;
diff --git a/src/security/tpm/tspi/log.c b/src/security/tpm/tspi/log.c
index 07623f75b1..1d6f9acf32 100644
--- a/src/security/tpm/tspi/log.c
+++ b/src/security/tpm/tspi/log.c
@@ -11,7 +11,7 @@
static struct tcpa_table *tcpa_cbmem_init(void)
{
- MAYBE_STATIC_BSS struct tcpa_table *tclt = NULL;
+ static struct tcpa_table *tclt;
if (tclt)
return tclt;
@@ -32,7 +32,7 @@ static struct tcpa_table *tcpa_cbmem_init(void)
struct tcpa_table *tcpa_log_init(void)
{
- MAYBE_STATIC_BSS struct tcpa_table *tclt = NULL;
+ static struct tcpa_table *tclt;
/* We are dealing here with pre CBMEM environment.
* If cbmem isn't available use CAR or SRAM */
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index b4bad8a913..bb01844e2d 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -51,7 +51,7 @@
uint32_t nc_read_top_of_low_memory(void)
{
- MAYBE_STATIC_BSS uint32_t tolm = 0;
+ static uint32_t tolm;
if (tolm)
return tolm;
diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c
index 2070cd7419..94b91cc047 100644
--- a/src/soc/intel/braswell/northcluster.c
+++ b/src/soc/intel/braswell/northcluster.c
@@ -56,7 +56,7 @@
uint32_t nc_read_top_of_low_memory(void)
{
- MAYBE_STATIC_BSS uint32_t tolm = 0;
+ static uint32_t tolm;
if (tolm)
return tolm;
diff --git a/toolchain.inc b/toolchain.inc
index 31d3e21876..b680b1c77d 100644
--- a/toolchain.inc
+++ b/toolchain.inc
@@ -55,7 +55,7 @@ CFLAGS_ppc64 +=
# stack use, we use 1.5K as heuristic, assuming that we typically have lots
# of tiny stack frames and the odd large one.
#
-# Store larger buffers in BSS, use MAYBE_STATIC_BSS to share data in cache-as-ram
+# Store larger buffers in BSS, use static to share data in cache-as-ram
# on x86.
# Since GCCs detection of dynamic array bounds unfortunately seems to be
# very basic, you'll sometimes have to use a static upper bound for the
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 03:05:07 +0000