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-rw-r--r--src/mainboard/acer/g43t-am3/dsdt.asl1
-rw-r--r--src/mainboard/asus/p5qc/dsdt.asl1
-rw-r--r--src/mainboard/asus/p5ql-em/dsdt.asl1
-rw-r--r--src/mainboard/intel/dg43gt/dsdt.asl1
-rw-r--r--src/southbridge/intel/i82801jx/Kconfig1
-rw-r--r--src/southbridge/intel/i82801jx/acpi/globalnvs.asl106
-rw-r--r--src/southbridge/intel/i82801jx/include/soc/nvs.h106
-rw-r--r--src/southbridge/intel/i82801jx/smihandler.c23
8 files changed, 2 insertions, 238 deletions
diff --git a/src/mainboard/acer/g43t-am3/dsdt.asl b/src/mainboard/acer/g43t-am3/dsdt.asl
index 9094e77182..9ad70469de 100644
--- a/src/mainboard/acer/g43t-am3/dsdt.asl
+++ b/src/mainboard/acer/g43t-am3/dsdt.asl
@@ -15,7 +15,6 @@ DefinitionBlock(
OSYS = 2002
// global NVS and variables
#include <southbridge/intel/common/acpi/platform.asl>
- #include <southbridge/intel/i82801jx/acpi/globalnvs.asl>
Device (\_SB.PCI0)
{
diff --git a/src/mainboard/asus/p5qc/dsdt.asl b/src/mainboard/asus/p5qc/dsdt.asl
index 6561493c0e..50527cfc7c 100644
--- a/src/mainboard/asus/p5qc/dsdt.asl
+++ b/src/mainboard/asus/p5qc/dsdt.asl
@@ -15,7 +15,6 @@ DefinitionBlock(
OSYS = 2002
// global NVS and variables
#include <southbridge/intel/common/acpi/platform.asl>
- #include <southbridge/intel/i82801jx/acpi/globalnvs.asl>
Scope (\_SB) {
Device (PCI0)
diff --git a/src/mainboard/asus/p5ql-em/dsdt.asl b/src/mainboard/asus/p5ql-em/dsdt.asl
index 8e1b7f9728..3f929d199a 100644
--- a/src/mainboard/asus/p5ql-em/dsdt.asl
+++ b/src/mainboard/asus/p5ql-em/dsdt.asl
@@ -17,7 +17,6 @@ DefinitionBlock(
OSYS = 2002
// global NVS and variables
#include <southbridge/intel/common/acpi/platform.asl>
- #include <southbridge/intel/i82801jx/acpi/globalnvs.asl>
Scope (\_SB) {
Device (PCI0)
diff --git a/src/mainboard/intel/dg43gt/dsdt.asl b/src/mainboard/intel/dg43gt/dsdt.asl
index 7b8e27a460..a5f446fb73 100644
--- a/src/mainboard/intel/dg43gt/dsdt.asl
+++ b/src/mainboard/intel/dg43gt/dsdt.asl
@@ -15,7 +15,6 @@ DefinitionBlock(
OSYS = 2002
// global NVS and variables
#include <southbridge/intel/common/acpi/platform.asl>
- #include <southbridge/intel/i82801jx/acpi/globalnvs.asl>
Scope (\_SB) {
Device (PCI0)
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig
index bd553eea76..687cb45924 100644
--- a/src/southbridge/intel/i82801jx/Kconfig
+++ b/src/southbridge/intel/i82801jx/Kconfig
@@ -3,7 +3,6 @@
config SOUTHBRIDGE_INTEL_I82801JX
bool
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
- select ACPI_SOC_NVS
select AZALIA_PLUGIN_SUPPORT
select HAVE_POWER_STATE_AFTER_FAILURE
select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
diff --git a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl
deleted file mode 100644
index 25c5290ece..0000000000
--- a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl
+++ /dev/null
@@ -1,106 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Global Variables */
-
-Field (GNVS, ByteAcc, NoLock, Preserve)
-{
- /* Miscellaneous */
- , 16, // 0x00 - Operating System
- SMIF, 8, // 0x02 - SMI function
- PRM0, 8, // 0x03 - SMI function parameter
- PRM1, 8, // 0x04 - SMI function parameter
- SCIF, 8, // 0x05 - SCI function
- PRM2, 8, // 0x06 - SCI function parameter
- PRM3, 8, // 0x07 - SCI function parameter
- LCKF, 8, // 0x08 - Global Lock function for EC
- PRM4, 8, // 0x09 - Lock function parameter
- PRM5, 8, // 0x0a - Lock function parameter
- P80D, 32, // 0x0b - Debug port (IO 0x80) value
- LIDS, 8, // 0x0f - LID state (open = 1)
- , 8, // 0x10 - Power State (AC = 1)
- DBGS, 8, // 0x11 - Debug State
- LINX, 8, // 0x12 - Linux OS
- DCKN, 8, // 0x13 - PCIe docking state
- /* Thermal policy */
- Offset (0x14),
- ACTT, 8, // 0x14 - active trip point
- TPSV, 8, // 0x15 - passive trip point
- TC1V, 8, // 0x16 - passive trip point TC1
- TC2V, 8, // 0x17 - passive trip point TC2
- TSPV, 8, // 0x18 - passive trip point TSP
- TCRT, 8, // 0x19 - critical trip point
- DTSE, 8, // 0x1a - Digital Thermal Sensor enable
- DTS1, 8, // 0x1b - DT sensor 1
- FLVL, 8, // 0x1c - current fan level
- /* Battery Support */
- Offset (0x1e),
- BNUM, 8, // 0x1e - number of batteries
- B0SC, 8, // 0x1f - BAT0 stored capacity
- B1SC, 8, // 0x20 - BAT1 stored capacity
- B2SC, 8, // 0x21 - BAT2 stored capacity
- B0SS, 8, // 0x22 - BAT0 stored status
- B1SS, 8, // 0x23 - BAT1 stored status
- B2SS, 8, // 0x24 - BAT2 stored status
- /* Processor Identification */
- Offset (0x28),
- , 8, // 0x28 - Enabled by coreboot
- , 8, // 0x29 - Multi Processor Enable
- PCP0, 8, // 0x2a - PDC CPU/CORE 0
- PCP1, 8, // 0x2b - PDC CPU/CORE 1
- PPCM, 8, // 0x2c - Max. PPC state
- /* Super I/O & CMOS config */
- Offset (0x32),
- NATP, 8, // 0x32 -
- CMAP, 8, // 0x33 -
- CMBP, 8, // 0x34 -
- LPTP, 8, // 0x35 - LPT Port
- FDCP, 8, // 0x36 - Floppy Disk Controller
- RFDV, 8, // 0x37 -
- HOTK, 8, // 0x38 -
- RTCF, 8, // 0x39 -
- UTIL, 8, // 0x3a -
- ACIN, 8, // 0x3b -
- /* Integrated Graphics Device */
- Offset (0x3c),
- IGDS, 8, // 0x3c - IGD state (primary = 1)
- TLST, 8, // 0x3d - Display Toggle List pointer
- CADL, 8, // 0x3e - Currently Attached Devices List
- PADL, 8, // 0x3f - Previously Attached Devices List
- /* Backlight Control */
- Offset (0x64),
- BLCS, 8, // 0x64 - Backlight control possible?
- BRTL, 8, // 0x65 - Brightness Level
- ODDS, 8, // 0x66
- /* Ambient Light Sensors */
- Offset (0x6e),
- ALSE, 8, // 0x6e - ALS enable
- ALAF, 8, // 0x6f - Ambient light adjustment factor
- LLOW, 8, // 0x70 - LUX Low
- LHIH, 8, // 0x71 - LUX High
- /* EMA */
- Offset (0x78),
- EMAE, 8, // 0x78 - EMA enable
- EMAP, 16, // 0x79 - EMA pointer
- EMAL, 16, // 0x7b - EMA length
- /* MEF */
- Offset (0x82),
- MEFE, 8, // 0x82 - MEF enable
- /* TPM support */
- Offset (0x8c),
- TPMP, 8, // 0x8c - TPM
- TPME, 8, // 0x8d - TPM enable
- /* SATA */
- Offset (0x96),
- GTF0, 56, // 0x96 - GTF task file buffer for port 0
- GTF1, 56, // 0x9d - GTF task file buffer for port 1
- GTF2, 56, // 0xa4 - GTF task file buffer for port 2
- IDEM, 8, // 0xab - IDE mode (compatible / enhanced)
- IDET, 8, // 0xac - IDE
- /* Mainboard Specific (TODO move elsewhere) */
- Offset (0xf0),
- DOCK, 8, // 0xf0 - Docking Status
- BTEN, 8, // 0xf1 - Bluetooth Enable
- CBMC, 32,
- PM1I, 32, // System Wake Source - PM1 Index
- GPEI, 32, // GPE Wake Source
-}
diff --git a/src/southbridge/intel/i82801jx/include/soc/nvs.h b/src/southbridge/intel/i82801jx/include/soc/nvs.h
deleted file mode 100644
index 30fb5e04c8..0000000000
--- a/src/southbridge/intel/i82801jx/include/soc/nvs.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef SOUTHBRIDGE_INTEL_I82801JX_NVS_H
-#define SOUTHBRIDGE_INTEL_I82801JX_NVS_H
-#include <stdint.h>
-
-struct __packed global_nvs {
- /* Miscellaneous */
- u16 unused_was_osys; /* 0x00 - Operating System */
- u8 smif; /* 0x02 - SMI function call ("TRAP") */
- u8 prm0; /* 0x03 - SMI function call parameter */
- u8 prm1; /* 0x04 - SMI function call parameter */
- u8 scif; /* 0x05 - SCI function call (via _L00) */
- u8 prm2; /* 0x06 - SCI function call parameter */
- u8 prm3; /* 0x07 - SCI function call parameter */
- u8 lckf; /* 0x08 - Global Lock function for EC */
- u8 prm4; /* 0x09 - Lock function parameter */
- u8 prm5; /* 0x0a - Lock function parameter */
- u32 p80d; /* 0x0b - Debug port (IO 0x80) value */
- u8 lids; /* 0x0f - LID state (open = 1) */
- u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */
- u8 dbgs; /* 0x11 - Debug state */
- u8 linx; /* 0x12 - Linux OS */
- u8 dckn; /* 0x13 - PCIe docking state */
- /* Thermal policy */
- u8 actt; /* 0x14 - active trip point */
- u8 tpsv; /* 0x15 - passive trip point */
- u8 tc1v; /* 0x16 - passive trip point TC1 */
- u8 tc2v; /* 0x17 - passive trip point TC2 */
- u8 tspv; /* 0x18 - passive trip point TSP */
- u8 tcrt; /* 0x19 - critical trip point */
- u8 dtse; /* 0x1a - Digital Thermal Sensor enable */
- u8 dts1; /* 0x1b - DT sensor 1 */
- u8 flvl; /* 0x1c - current fan level */
- u8 rsvd2;
- /* Battery Support */
- u8 bnum; /* 0x1e - number of batteries */
- u8 b0sc, b1sc, b2sc; /* 0x1f-0x21 - stored capacity */
- u8 b0ss, b1ss, b2ss; /* 0x22-0x24 - stored status */
- u8 rsvd3[3];
- /* Processor Identification */
- u8 unused_was_apic; /* 0x28 - APIC enabled */
- u8 unused_was_mpen; /* 0x29 - MP capable/enabled */
- u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */
- u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */
- u8 ppcm; /* 0x2c - Max. PPC state */
- u8 rsvd4[5];
- /* Super I/O & CMOS config */
- u8 natp; /* 0x32 - SIO type */
- u8 cmap; /* 0x33 - */
- u8 cmbp; /* 0x34 - */
- u8 lptp; /* 0x35 - LPT port */
- u8 fdcp; /* 0x36 - Floppy Disk Controller */
- u8 rfdv; /* 0x37 - */
- u8 hotk; /* 0x38 - Hot Key */
- u8 rtcf;
- u8 util;
- u8 acin;
- /* Integrated Graphics Device */
- u8 igds; /* 0x3c - IGD state */
- u8 tlst; /* 0x3d - Display Toggle List Pointer */
- u8 cadl; /* 0x3e - currently attached devices */
- u8 padl; /* 0x3f - previously attached devices */
- u8 rsvd5[36];
- /* Backlight Control */
- u8 blcs; /* 0x64 - Backlight Control possible */
- u8 brtl;
- u8 odds;
- u8 rsvd6[0x7];
- /* Ambient Light Sensors*/
- u8 alse; /* 0x6e - ALS enable */
- u8 alaf;
- u8 llow;
- u8 lhih;
- u8 rsvd7[0x6];
- /* EMA */
- u8 emae; /* 0x78 - EMA enable */
- u16 emap;
- u16 emal;
- u8 rsvd8[0x5];
- /* MEF */
- u8 mefe; /* 0x82 - MEF enable */
- u8 rsvd9[0x9];
- /* TPM support */
- u8 tpmp; /* 0x8c - TPM */
- u8 tpme;
- u8 rsvd10[8];
- /* SATA */
- u8 gtf0[7]; /* 0x96 - GTF task file buffer for port 0 */
- u8 gtf1[7];
- u8 gtf2[7];
- u8 idem;
- u8 idet;
- u8 rsvd11[67];
- /* Mainboard specific */
- u8 dock; /* 0xf0 - Docking Status */
- u8 bten;
-
- u32 cbmc;
-
- /* Required for future unified acpi_save_wake_source. */
- u32 pm1i;
- u32 gpei;
-};
-
-#endif /* SOUTHBRIDGE_INTEL_I82801JX_NVS_H */
diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c
index 03a6442eb1..ed58a11882 100644
--- a/src/southbridge/intel/i82801jx/smihandler.c
+++ b/src/southbridge/intel/i82801jx/smihandler.c
@@ -4,7 +4,6 @@
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/pci_def.h>
-#include <soc/nvs.h>
#include <southbridge/intel/common/pmutil.h>
#include "i82801jx.h"
@@ -13,23 +12,6 @@
*/
u16 pmbase = DEFAULT_PMBASE;
-int southbridge_io_trap_handler(int smif)
-{
- switch (smif) {
- case 0x32:
- printk(BIOS_DEBUG, "OS Init\n");
- /* gnvs->smif:
- * On success, the IO Trap Handler returns 0
- * On failure, the IO Trap Handler returns a value != 0
- */
- gnvs->smif = 0;
- return 1; /* IO trap handled */
- }
-
- /* Not handled */
- return 0;
-}
-
void southbridge_smi_monitor(void)
{
#define IOTRAP(x) (trap_sts & (1 << x))
@@ -46,10 +28,9 @@ void southbridge_smi_monitor(void)
mask |= (0xff << ((i - 16) << 3));
}
- /* IOTRAP(3) SMI function call */
+ /* IOTRAP(3) SMI function call (unused) */
if (IOTRAP(3)) {
- if (gnvs && gnvs->smif)
- io_trap_handler(gnvs->smif); // call function smif
+ printk(BIOS_DEBUG, "SMI function call not implemented\n");
return;
}