diff options
| -rw-r--r-- | src/soc/intel/common/Kconfig | 13 | ||||
| -rw-r--r-- | src/soc/intel/common/Makefile.inc | 5 | ||||
| -rw-r--r-- | src/soc/intel/common/vbt.c | 42 | ||||
| -rw-r--r-- | src/soc/intel/common/vbt.h | 24 |
4 files changed, 84 insertions, 0 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index 8b68aad46c..c9ffc93d28 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -59,4 +59,17 @@ config MMA_BLOBS_PATH depends on MMA default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/mma" +config ADD_VBT_DATA_FILE + bool "Add a Video Bios Table (VBT) binary to CBFS" + help + Add a VBT file data file to CBFS. The VBT describes the integrated + GPU and connections, and is needed by FSP in order to initialize the + display. + +config VBT_FILE + string "VBT binary path and filename" + depends on ADD_VBT_DATA_FILE + help + The path and filename of the VBT binary. + endif # SOC_INTEL_COMMON diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc index a7218b71db..8dfd4c0b76 100644 --- a/src/soc/intel/common/Makefile.inc +++ b/src/soc/intel/common/Makefile.inc @@ -14,6 +14,7 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c ramstage-y += util.c ramstage-$(CONFIG_MMA) += mma.c ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c +ramstage-y += vbt.c # Create and add the MRC cache to the cbfs image ifneq ($(CONFIG_CHROMEOS),y) @@ -71,4 +72,8 @@ $(foreach mma_test, $(MMA_TEST_CONFIG_NAMES),\ endif +cbfs-files-$(CONFIG_ADD_VBT_DATA_FILE) += vbt.bin +vbt.bin-file := $(call strip_quotes,$(CONFIG_VBT_FILE)) +vbt.bin-type := raw + endif diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c new file mode 100644 index 0000000000..80b17a2f87 --- /dev/null +++ b/src/soc/intel/common/vbt.c @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <cbfs.h> +#include <console/console.h> + +#include "vbt.h" + +#define VBT_SIGNATURE 0x54425624 + +enum cb_err locate_vbt(struct region_device *rdev) +{ + uint32_t vbtsig = 0; + struct cbfsf file_desc; + + if (cbfs_boot_locate(&file_desc, "vbt.bin", NULL) < 0) { + printk(BIOS_ERR, "Could not locate a VBT file in in CBFS\n"); + return CB_ERR; + } + + cbfs_file_data(rdev, &file_desc); + rdev_readat(rdev, &vbtsig, 0, sizeof(uint32_t)); + + if (vbtsig != VBT_SIGNATURE) { + printk(BIOS_ERR, "Missing/invalid signature in VBT data file!\n"); + return CB_ERR; + } + + return CB_SUCCESS; +} diff --git a/src/soc/intel/common/vbt.h b/src/soc/intel/common/vbt.h new file mode 100644 index 0000000000..e1a45cc887 --- /dev/null +++ b/src/soc/intel/common/vbt.h @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _INTEL_COMMON_VBT_H_ +#define _INTEL_COMMON_VBT_H_ + +#include <commonlib/region.h> +#include <types.h> + +/* locate .vbt file */ +enum cb_err locate_vbt(struct region_device *rdev); +#endif |