diff options
| -rw-r--r-- | src/drivers/uart/Kconfig | 7 | ||||
| -rw-r--r-- | src/drivers/uart/uart8250io.c | 10 | ||||
| -rw-r--r-- | src/drivers/uart/uart8250mem.c | 3 | ||||
| -rw-r--r-- | src/drivers/uart/util.c | 17 | ||||
| -rw-r--r-- | src/include/console/uart.h | 4 |
5 files changed, 37 insertions, 4 deletions
diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index ae3e81adb1..cb129b0643 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -13,6 +13,13 @@ config DRIVERS_UART_8250IO config NO_UART_ON_SUPERIO def_bool n +config UART_OVERRIDE_INPUT_CLOCK_DIVIDER + boolean + default n + help + Set to "y" when the platform overrides the uart_input_clock_divider + routine. + config DRIVERS_UART_8250MEM bool default n diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index 0974005a81..69244f58df 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -30,8 +30,12 @@ /* Nominal values only, good for the range of choices Kconfig offers for * set of standard baudrates. */ -#define BAUDRATE_REFCLK (115200) -#define BAUDRATE_OVERSAMPLE (1) + +/* Multiply the maximim baud-rate by the default oversample rate to compute + * the default input clock to the UART. The uart_baudrate_divisor divides + * by the oversample clock to determine the final baud-rate. + */ +#define BAUDRATE_REFCLK (115200 * 16) /* Expected character delay at 1200bps is 9ms for a working UART * and no flow-control. Assume UART as stuck if shift register @@ -112,7 +116,7 @@ void uart_init(int idx) { unsigned int div; div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, - BAUDRATE_OVERSAMPLE); + uart_input_clock_divider()); uart8250_init(uart_platform_base(idx), div); } diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c index 2f2bd2df56..4b87756d0b 100644 --- a/src/drivers/uart/uart8250mem.c +++ b/src/drivers/uart/uart8250mem.c @@ -117,7 +117,8 @@ void uart_init(int idx) return; unsigned int div; - div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); + div = uart_baudrate_divisor(default_baudrate(), + uart_platform_refclk(), uart_input_clock_divider()); uart8250_mem_init(base, div); } diff --git a/src/drivers/uart/util.c b/src/drivers/uart/util.c index 4121f60852..5e8d223252 100644 --- a/src/drivers/uart/util.c +++ b/src/drivers/uart/util.c @@ -42,3 +42,20 @@ unsigned int uart_baudrate_divisor(unsigned int baudrate, { return (1 + (2 * refclk) / (baudrate * oversample)) / 2; } + +#if !IS_ENABLED(CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER) +unsigned int uart_input_clock_divider(void) +{ + /* Specify the default oversample rate for the UART. + * + * UARTs oversample the receive data. The UART's input clock first + * enters the baud-rate divider to generate the oversample clock. Then + * the UART typically divides the result by 16. The asynchronous + * receive data is synchronized with the oversample clock and when a + * start bit is detected the UART delays half a bit time using the + * oversample clock. Samples are then taken to verify the start bit and + * if present, samples are taken for the rest of the frame. + */ + return 16; +} +#endif diff --git a/src/include/console/uart.h b/src/include/console/uart.h index 8458086d49..a3d650b500 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -35,6 +35,10 @@ unsigned int default_baudrate(void); unsigned int uart_baudrate_divisor(unsigned int baudrate, unsigned int refclk, unsigned int oversample); +/* Returns the oversample divisor multiplied by any other divisors that act + * on the input clock + */ +unsigned int uart_input_clock_divider(void); void uart_init(int idx); void uart_tx_byte(int idx, unsigned char data); |