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-rw-r--r--src/soc/intel/apollolake/chip.c3
-rw-r--r--src/soc/intel/apollolake/chip.h6
2 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index de33e8217b..363450911a 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -754,6 +754,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
if (!xdci_can_enable())
dev->enabled = 0;
silconfig->UsbOtg = dev->enabled;
+
+ /* Set VTD feature according to devicetree */
+ silconfig->VtdEnable = cfg->enable_vtd;
}
struct chip_operations soc_intel_apollolake_ops = {
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 6c2404a405..b9e368cddc 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -188,6 +188,12 @@ struct soc_intel_apollolake_config {
* 00=1.10v, 01=1.15v, 10=1.24v, 11=1.20v (default).
*/
uint32_t PmicVdd2Voltage;
+
+ /* Option to enable VTD feature. Default is 0 which disables VTD
+ * capability in FSP. Setting this option to 1 in devicetree will enable
+ * the Upd parameter VtdEnable.
+ */
+ uint8_t enable_vtd;
};
typedef struct soc_intel_apollolake_config config_t;