diff options
| -rw-r--r-- | src/soc/intel/cannonlake/finalize.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c index 8387bb86f7..9b56c0ada2 100644 --- a/src/soc/intel/cannonlake/finalize.c +++ b/src/soc/intel/cannonlake/finalize.c @@ -6,6 +6,7 @@ #include <console/post_codes.h> #include <cpu/x86/smm.h> #include <device/pci.h> +#include <intelblocks/cpulib.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <intelblocks/pmclib.h> @@ -69,6 +70,14 @@ static void pch_finalize(void) pch_handle_sideband(config); pmc_clear_pmcon_sts(); + + /* + * Lock chipset memory registers to protect SMM. + * When SkipMpInit=0, this is done by FSP. + */ + if (!CONFIG(USE_INTEL_FSP_MP_INIT)) + cpu_lt_lock_memory(); + } static void soc_finalize(void *unused) |