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-rw-r--r--src/arch/x86/cpu.c29
-rw-r--r--src/cpu/x86/mp_init.c35
-rw-r--r--src/include/cpu/cpu.h4
-rw-r--r--src/include/cpu/x86/mp.h3
4 files changed, 40 insertions, 31 deletions
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c
index 80d4d0da4a..f19b389441 100644
--- a/src/arch/x86/cpu.c
+++ b/src/arch/x86/cpu.c
@@ -219,6 +219,35 @@ static void set_cpu_ops(struct device *cpu)
cpu->ops = driver ? driver->ops : NULL;
}
+/* Keep track of default apic ids for SMM. */
+static int cpus_default_apic_id[CONFIG_MAX_CPUS];
+
+/*
+ * When CPUID executes with EAX set to 1, additional processor identification
+ * information is returned to EBX register:
+ * Default APIC ID: EBX[31-24] - this number is the 8 bit ID that is assigned
+ * to the local APIC on the processor during power on.
+ */
+static int initial_lapicid(void)
+{
+ return cpuid_ebx(1) >> 24;
+}
+
+/* Function to keep track of cpu default apic_id */
+void cpu_add_map_entry(unsigned int index)
+{
+ cpus_default_apic_id[index] = initial_lapicid();
+}
+
+/* Returns default APIC id based on logical_cpu number or < 0 on failure. */
+int cpu_get_apic_id(int logical_cpu)
+{
+ if (logical_cpu >= CONFIG_MAX_CPUS || logical_cpu < 0)
+ return -1;
+
+ return cpus_default_apic_id[logical_cpu];
+}
+
void cpu_initialize(unsigned int index)
{
/* Because we busy wait at the printk spinlock.
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index 9d51b3e8b5..8957515540 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -135,20 +135,8 @@ struct mp_flight_plan {
static int global_num_aps;
static struct mp_flight_plan mp_info;
-struct cpu_map {
- struct device *dev;
- /* Keep track of default apic ids for SMM. */
- int default_apic_id;
-};
-
-/* Keep track of APIC and device structure for each CPU. */
-static struct cpu_map cpus[CONFIG_MAX_CPUS];
-
-static inline void add_cpu_map_entry(const struct cpu_info *info)
-{
- cpus[info->index].dev = info->cpu;
- cpus[info->index].default_apic_id = cpuid_ebx(1) >> 24;
-}
+/* Keep track of device structure for each CPU. */
+static struct device *cpus_dev[CONFIG_MAX_CPUS];
static inline void barrier_wait(atomic_t *b)
{
@@ -212,9 +200,9 @@ static void asmlinkage ap_init(unsigned int cpu)
info = cpu_info();
info->index = cpu;
- info->cpu = cpus[cpu].dev;
+ info->cpu = cpus_dev[cpu];
- add_cpu_map_entry(info);
+ cpu_add_map_entry(info->index);
thread_init_cpu_info_non_bsp(info);
/* Fix up APIC id with reality. */
@@ -411,7 +399,7 @@ static int allocate_cpu_devices(struct bus *cpu_bus, struct mp_params *p)
continue;
}
new->name = processor_name;
- cpus[i].dev = new;
+ cpus_dev[i] = new;
}
return max_cpus;
@@ -589,7 +577,7 @@ static void init_bsp(struct bus *cpu_bus)
printk(BIOS_CRIT, "BSP index(%d) != 0!\n", info->index);
/* Track BSP in cpu_map structures. */
- add_cpu_map_entry(info);
+ cpu_add_map_entry(info->index);
}
/*
@@ -667,15 +655,6 @@ static void mp_initialize_cpu(void)
cpu_initialize(info->index);
}
-/* Returns APIC id for coreboot CPU number or < 0 on failure. */
-int mp_get_apic_id(int logical_cpu)
-{
- if (logical_cpu >= CONFIG_MAX_CPUS || logical_cpu < 0)
- return -1;
-
- return cpus[logical_cpu].default_apic_id;
-}
-
void smm_initiate_relocation_parallel(void)
{
if ((lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY)) {
@@ -769,7 +748,7 @@ static void adjust_smm_apic_id_map(struct smm_loader_params *smm_params)
struct smm_runtime *runtime = smm_params->runtime;
for (i = 0; i < CONFIG_MAX_CPUS; i++)
- runtime->apic_id_to_cpu[i] = mp_get_apic_id(i);
+ runtime->apic_id_to_cpu[i] = cpu_get_apic_id(i);
}
static int install_relocation_handler(int num_cpus, size_t save_state_size)
diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h
index 60940f07d1..9a283735d3 100644
--- a/src/include/cpu/cpu.h
+++ b/src/include/cpu/cpu.h
@@ -5,6 +5,10 @@
#if !defined(__ROMCC__)
void cpu_initialize(unsigned int cpu_index);
+/* Returns default APIC id based on logical_cpu number or < 0 on failure. */
+int cpu_get_apic_id(int logical_cpu);
+/* Function to keep track of cpu default apic_id */
+void cpu_add_map_entry(unsigned int index);
struct bus;
void initialize_cpus(struct bus *cpu_bus);
asmlinkage void secondary_cpu_init(unsigned int cpu_index);
diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h
index 9789910b46..c04252ec35 100644
--- a/src/include/cpu/x86/mp.h
+++ b/src/include/cpu/x86/mp.h
@@ -145,9 +145,6 @@ int mp_run_on_all_cpus(void (*func)(void *), void *arg, long expire_us);
*/
int mp_park_aps(void);
-/* Returns APIC id for coreboot CPU number or < 0 on failure. */
-int mp_get_apic_id(int logical_cpu);
-
/*
* SMM helpers to use with initializing CPUs.
*/