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-rw-r--r--src/arch/x86/init/romstage.ld3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/x86/init/romstage.ld b/src/arch/x86/init/romstage.ld
index ca4e820217..86093b3cbd 100644
--- a/src/arch/x86/init/romstage.ld
+++ b/src/arch/x86/init/romstage.ld
@@ -53,5 +53,6 @@ SECTIONS
}
_bogus = ASSERT((SIZEOF(.car.data) <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full");
- _bogus = ASSERT((SIZEOF(.bss) + SIZEOF(.data)) == 0 || CONFIG_CPU_AMD_AGESA, "Do not use global variables in romstage");
+ _bogus = ASSERT(SIZEOF(.bss) == 0 || CONFIG_CPU_AMD_AGESA, ".bss is non-zero size in romstage which is not allowed -- global variable?");
+ _bogus = ASSERT(SIZEOF(.data) == 0 || CONFIG_CPU_AMD_AGESA, ".data is non-zero size in romstage which is not allowed -- global variable?");
}