diff options
| -rw-r--r-- | src/mainboard/google/brya/Kconfig | 6 | ||||
| -rw-r--r-- | src/mainboard/google/brya/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/mainboard/google/brya/chromeos.c | 43 | ||||
| -rw-r--r-- | src/mainboard/google/brya/dsdt.asl | 3 | ||||
| -rw-r--r-- | src/mainboard/google/brya/mainboard.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/gpio.c | 10 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h | 1 |
7 files changed, 70 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 4a9f2e15b1..f955b64924 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -4,6 +4,7 @@ config BOARD_GOOGLE_BASEBOARD_BRYA select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select INTEL_LPSS_UART_FOR_CONSOLE + select MAINBOARD_HAS_CHROMEOS select SOC_INTEL_ALDERLAKE if BOARD_GOOGLE_BASEBOARD_BRYA @@ -12,6 +13,11 @@ config BASEBOARD_BRYA_LAPTOP def_bool n select SYSTEM_TYPE_LAPTOP +config CHROMEOS + bool + default y + select VBOOT_LID_SWITCH + config DEVICETREE string default "variants/baseboard/devicetree.cb" diff --git a/src/mainboard/google/brya/Makefile.inc b/src/mainboard/google/brya/Makefile.inc index cdd0eb6ef8..fda1bfb990 100644 --- a/src/mainboard/google/brya/Makefile.inc +++ b/src/mainboard/google/brya/Makefile.inc @@ -1,7 +1,11 @@ bootblock-y += bootblock.c +verstage-$(CONFIG_CHROMEOS) += chromeos.c + +romstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-y += romstage.c +ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-y += mainboard.c VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR)) diff --git a/src/mainboard/google/brya/chromeos.c b/src/mainboard/google/brya/chromeos.c new file mode 100644 index 0000000000..2e6ea3e27d --- /dev/null +++ b/src/mainboard/google/brya/chromeos.c @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <boot/coreboot_tables.h> +#include <gpio.h> +#include <vendorcode/google/chromeos/chromeos.h> + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + struct lb_gpio chromeos_gpios[] = { + {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, + {-1, ACTIVE_HIGH, 0, "power"}, + {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, + }; + lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); +} + +int get_lid_switch(void) +{ + /* TODO: use Chrome EC switches when EC support is added */ + return 1; +} + +int get_recovery_mode_switch(void) +{ + /* TODO: use Chrome EC switches when EC support is added */ + return 0; +} + +int get_write_protect_state(void) +{ + /* No write protect */ + return 0; +} + +void mainboard_chromeos_acpi_generate(void) +{ + const struct cros_gpio *gpios; + size_t num; + gpios = variant_cros_gpios(&num); + chromeos_acpi_gpio_generate(gpios, num); +} diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl index ebb6ec58f0..4fc205a24b 100644 --- a/src/mainboard/google/brya/dsdt.asl +++ b/src/mainboard/google/brya/dsdt.asl @@ -30,4 +30,7 @@ DefinitionBlock( /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> + + /* Chrome OS specific */ + #include <vendorcode/google/chromeos/acpi/chromeos.asl> } diff --git a/src/mainboard/google/brya/mainboard.c b/src/mainboard/google/brya/mainboard.c index d7c31565b9..fd0d5b651f 100644 --- a/src/mainboard/google/brya/mainboard.c +++ b/src/mainboard/google/brya/mainboard.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <acpi/acpi.h> #include <baseboard/variants.h> #include <device/device.h> +#include <vendorcode/google/chromeos/chromeos.h> static void mainboard_init(void *chip_info) { @@ -13,7 +15,7 @@ static void mainboard_init(void *chip_info) static void mainboard_enable(struct device *dev) { - /* TODO: Enable mainboard */ + dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/brya/variants/baseboard/gpio.c b/src/mainboard/google/brya/variants/baseboard/gpio.c index 39450cee10..12e725f70c 100644 --- a/src/mainboard/google/brya/variants/baseboard/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/gpio.c @@ -3,6 +3,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <commonlib/helpers.h> +#include <vendorcode/google/chromeos/chromeos.h> /* Pad configuration in ramstage */ static const struct pad_config gpio_table[] = { @@ -25,3 +26,12 @@ const struct pad_config *__weak variant_early_gpio_table(size_t *num) *num = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } + +static const struct cros_gpio cros_gpios[] = { +}; + +const struct cros_gpio *__weak variant_cros_gpios(size_t *num) +{ + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; +} diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h index 95f2d65a24..663306c291 100644 --- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h @@ -12,5 +12,6 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); +const struct cros_gpio *variant_cros_gpios(size_t *num); #endif /*__BASEBOARD_VARIANTS_H__ */ |