diff options
| -rw-r--r-- | src/southbridge/intel/lynxpoint/bootblock.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c index 20d0ee3342..1a9e7bba61 100644 --- a/src/southbridge/intel/lynxpoint/bootblock.c +++ b/src/southbridge/intel/lynxpoint/bootblock.c @@ -54,7 +54,7 @@ static void map_rcba(void) static void enable_port80_on_lpc(void) { - /* Enable port 80 POST on LPC. The chipset does this by deafult, + /* Enable port 80 POST on LPC. The chipset does this by default, * but it doesn't appear to hurt anything. */ u32 gcs = RCBA32(GCS); gcs = gcs & ~0x4; diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 10f57f543e..474c7df32c 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -660,7 +660,7 @@ static void pch_lpc_add_gen_io_resources(struct device *dev, int reg_value, { /* * Check if the register is enabled. If so and the base exceeds the - * device's deafult claim range add the resoure. + * device's default, claim range and add the resource. */ if (reg_value & 1) { u16 base = reg_value & 0xfffc; |