diff options
| -rw-r--r-- | src/mainboard/google/guybrush/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/google/guybrush/variants/baseboard/devicetree.cb | 58 |
2 files changed, 58 insertions, 1 deletions
diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig index fc515af422..5326616edb 100644 --- a/src/mainboard/google/guybrush/Kconfig +++ b/src/mainboard/google/guybrush/Kconfig @@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS select BOARD_ROMSIZE_KB_16384 select DISABLE_KEYBOARD_RESET_PIN select DISABLE_SPI_FLASH_ROM_SHARING + select DRIVERS_ACPI_THERMAL_ZONE select DRIVERS_AMD_I2S_MACHINE_DEV select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_I2C_GENERIC diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb index a5ec351168..a30772054a 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb @@ -152,7 +152,7 @@ chip soc/amd/cezanne device ref lpc_bridge on chip ec/google/chromeec - device pnp 0c09.0 on end + device pnp 0c09.0 alias chrome_ec on end end end end # domain @@ -168,4 +168,60 @@ chip soc/amd/cezanne device ref uart_0 on end # UART0 + # See https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/baseboard/guybrush/baseboard.c;l=221 + # for the EC configuration. + # + # EC is configured to power off the system at 105C, so add a two degree + # buffer so the OS can gracefully shutdown. + # + # EC is configured to assert PROCHOT at 100C. That drastically lowers + # performance. Instead we will tell the OS to start throttling the CPUs + # at 95C in hopes that we don't hit the PROCHOT limit. + # + # We set use_acpi1_thermal_zone_scope because the Chrome ec.asl + # performs a `Notify` to the `_\TZ` scope. + chip drivers/acpi/thermal_zone + register "description" = ""SOC"" + use chrome_ec as temperature_controller + register "sensor_id" = "0" + register "polling_period" = "10" + register "critical_temperature" = "103" + register "passive_config.temperature" = "95" + register "use_acpi1_thermal_zone_scope" = "true" + + device generic 0 on end + end + chip drivers/acpi/thermal_zone + register "description" = ""Charger"" + use chrome_ec as temperature_controller + register "sensor_id" = "1" + register "polling_period" = "10" + register "critical_temperature" = "103" + register "passive_config.temperature" = "95" + register "use_acpi1_thermal_zone_scope" = "true" + + device generic 1 on end + end + chip drivers/acpi/thermal_zone + register "description" = ""Memory"" + use chrome_ec as temperature_controller + register "sensor_id" = "2" + register "polling_period" = "10" + register "critical_temperature" = "103" + register "passive_config.temperature" = "95" + register "use_acpi1_thermal_zone_scope" = "true" + + device generic 2 on end + end + chip drivers/acpi/thermal_zone + register "description" = ""CPU"" + use chrome_ec as temperature_controller + register "sensor_id" = "3" + register "polling_period" = "10" + register "critical_temperature" = "103" + register "passive_config.temperature" = "95" + register "use_acpi1_thermal_zone_scope" = "true" + + device generic 3 on end + end end # chip soc/amd/cezanne |