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-rw-r--r--src/northbridge/intel/pineview/acpi/pineview.asl2
-rw-r--r--src/northbridge/intel/pineview/memmap.h (renamed from src/northbridge/intel/pineview/iomap.h)6
-rw-r--r--src/northbridge/intel/pineview/pineview.h2
3 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/intel/pineview/acpi/pineview.asl b/src/northbridge/intel/pineview/acpi/pineview.asl
index 3579a260b9..9515c317a9 100644
--- a/src/northbridge/intel/pineview/acpi/pineview.asl
+++ b/src/northbridge/intel/pineview/acpi/pineview.asl
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include "hostbridge.asl"
-#include "../iomap.h"
+#include "../memmap.h"
#include <southbridge/intel/common/rcba.h>
/* PCI Device Resource Consumption */
diff --git a/src/northbridge/intel/pineview/iomap.h b/src/northbridge/intel/pineview/memmap.h
index 4560da0eda..50ede0b717 100644
--- a/src/northbridge/intel/pineview/iomap.h
+++ b/src/northbridge/intel/pineview/memmap.h
@@ -1,11 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-#ifndef PINEVIEW_IOMAP_H
-#define PINEVIEW_IOMAP_H
+#ifndef PINEVIEW_MEMMAP_H
+#define PINEVIEW_MEMMAP_H
#define DEFAULT_MCHBAR 0xfed14000 /* 16 KB */
#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */
#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */
#define DEFAULT_PMIOBAR 0x00000400
-#endif /* PINEVIEW_IOMAP_H */
+#endif /* PINEVIEW_MEMMAP_H */
diff --git a/src/northbridge/intel/pineview/pineview.h b/src/northbridge/intel/pineview/pineview.h
index 47257ddb48..19b9584f3f 100644
--- a/src/northbridge/intel/pineview/pineview.h
+++ b/src/northbridge/intel/pineview/pineview.h
@@ -3,7 +3,7 @@
#ifndef NORTHBRIDGE_INTEL_PINEVIEW_H
#define NORTHBRIDGE_INTEL_PINEVIEW_H
-#include <northbridge/intel/pineview/iomap.h>
+#include <northbridge/intel/pineview/memmap.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#define BOOT_PATH_NORMAL 0