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-rw-r--r--Makefile.inc17
-rw-r--r--src/lib/program.ld7
-rw-r--r--src/soc/broadcom/cygnus/Makefile.inc6
-rw-r--r--src/soc/imgtec/pistachio/Makefile.inc8
-rw-r--r--src/soc/marvell/bg4cd/Makefile.inc3
-rw-r--r--src/soc/nvidia/tegra124/Makefile.inc3
-rw-r--r--src/soc/nvidia/tegra132/Makefile.inc3
-rw-r--r--src/soc/qualcomm/ipq806x/Makefile.inc8
-rw-r--r--src/soc/rockchip/rk3288/Makefile.inc3
-rw-r--r--src/soc/samsung/exynos5250/Makefile.inc3
-rw-r--r--src/soc/samsung/exynos5420/Makefile.inc3
11 files changed, 16 insertions, 48 deletions
diff --git a/Makefile.inc b/Makefile.inc
index 81c149da10..ac6ce0bd62 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -531,10 +531,19 @@ find-substr = $(word 1,$(subst _, ,$(1)))
# and remove .x the next time and finally return romstage
find-class = $(if $(filter $(1),$(basename $(1))),$(if $(CC_$(1)), $(1), $(call find-substr,$(1))),$(call find-class,$(basename $(1))))
-$(objcbfs)/%.bin: $(objcbfs)/%.elf
- $(eval class := $(call find-class,$(@F)))
- @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
- $(OBJCOPY_$(class)) -O binary $< $@
+# Bootblocks are not CBFS stages. coreboot is currently expecting the bss to
+# be cleared by the loader of the stage. For ARM SoCs that means one needs to
+# include the bss section in the binary so the BootROM clears the bss on
+# loading of the bootblock stage. Achieve this by marking the bss section
+# loadable,allocatable, and data. Do the same for the .data section in case
+# it's marked as NOBITS.
+$(objcbfs)/bootblock.raw.bin: $(objcbfs)/bootblock.elf
+ @printf " OBJCOPY $(notdir $(@))\n"
+ $(OBJCOPY_bootblock) --set-section-flags .bss=load,alloc,data --set-section-flags .data=load,alloc,data $< $<.tmp
+ $(OBJCOPY_bootblock) -O binary $<.tmp $@
+
+$(objcbfs)/%.bin: $(objcbfs)/%.raw.bin
+ cp $< $@
$(objcbfs)/%.elf: $(objcbfs)/%.debug
$(eval class := $(call find-class,$(@F)))
diff --git a/src/lib/program.ld b/src/lib/program.ld
index c8ce5eee39..ab3623997c 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -111,14 +111,7 @@
#endif
#if ARCH_STAGE_HAS_BSS_SECTION
-#if ENV_BOOTBLOCK
-/* Bootblocks are not CBFS stages, so they cannot communicate the amount of
- * (memsz - filesz) bytes the loader needs to clear for them. Therefore we merge
- * the BSS into the .data section so those zeroes get loaded explicitly. */
-.data . : {
-#else
.bss . : {
-#endif
. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_bss = .;
*(.bss)
diff --git a/src/soc/broadcom/cygnus/Makefile.inc b/src/soc/broadcom/cygnus/Makefile.inc
index ff231f704e..8bad15fd64 100644
--- a/src/soc/broadcom/cygnus/Makefile.inc
+++ b/src/soc/broadcom/cygnus/Makefile.inc
@@ -62,10 +62,6 @@ ramstage-y += usb.c
CPPFLAGS_common += -Isrc/soc/broadcom/cygnus/include/
-$(objcbfs)/bootblock.tmp: $(objcbfs)/bootblock.elf
- @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
- $(OBJCOPY_bootblock) -O binary $< $@
-
ifneq ($(V),1)
redirect := > /dev/null
endif
@@ -96,7 +92,7 @@ endif
# SLEEP 1
# DEEP_SLEEP 2
# EXCEPTION 4
-$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.tmp \
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin \
$(objutil)/broadcom/secimage/secimage \
util/broadcom/unauth.cfg \
util/broadcom/khmacsha256
diff --git a/src/soc/imgtec/pistachio/Makefile.inc b/src/soc/imgtec/pistachio/Makefile.inc
index df9fbcfb06..7f06db5a1e 100644
--- a/src/soc/imgtec/pistachio/Makefile.inc
+++ b/src/soc/imgtec/pistachio/Makefile.inc
@@ -46,14 +46,8 @@ romstage-y += monotonic_timer.c
CPPFLAGS_common += -Isrc/soc/imgtec/pistachio/include/
-# Generate the actual coreboot bootblock code
-$(objcbfs)/bootblock.raw: $(objcbfs)/bootblock.elf
- @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
- $(OBJCOPY_bootblock) -O binary $< $@.tmp
- @mv $@.tmp $@
-
# Create a complete bootblock which will start up the system
-$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw $(BIMGTOOL)
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BIMGTOOL)
@printf " BIMGTOOL $(subst $(obj)/,,$(@))\n"
$(BIMGTOOL) $< $@ $(call loadaddr,bootblock)
diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc
index 1a801c01e6..ded1917fba 100644
--- a/src/soc/marvell/bg4cd/Makefile.inc
+++ b/src/soc/marvell/bg4cd/Makefile.inc
@@ -45,9 +45,6 @@ ramstage-$(CONFIG_SPI_FLASH) += spi.c
CPPFLAGS_common += -Isrc/soc/marvell/bg4cd/include/
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf "Generating: $(subst $(obj)/,,$(@))\n"
@mkdir -p $(dir $@)
diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc
index 46ce59d757..38ba4f6270 100644
--- a/src/soc/nvidia/tegra124/Makefile.inc
+++ b/src/soc/nvidia/tegra124/Makefile.inc
@@ -84,9 +84,6 @@ CPPFLAGS_common += -Isrc/soc/nvidia/tegra124/include/
# package up the image pull in bootblock.bin, it will be this wrapped version
# instead of the raw bootblock.
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE)
@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
$(CBOOTIMAGE) -gbct --soc tegra124 $< $@
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc
index c192055cdf..bdd8074a53 100644
--- a/src/soc/nvidia/tegra132/Makefile.inc
+++ b/src/soc/nvidia/tegra132/Makefile.inc
@@ -121,9 +121,6 @@ CBOOTIMAGE_OPTS = --soc tegra132
# package up the image pull in bootblock.bin, it will be this wrapped version
# instead of the raw bootblock.
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE)
@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
$(CBOOTIMAGE) -gbct $(CBOOTIMAGE_OPTS) $< $@
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 84eae0be51..83b5e060c8 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -56,14 +56,8 @@ ramstage-y += tz_wrapper.S
ifeq ($(CONFIG_USE_BLOBS),y)
-# Generate the actual coreboot bootblock code
-$(objcbfs)/bootblock.raw: $(objcbfs)/bootblock.elf
- @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
- $(OBJCOPY_bootblock) -O binary $< $@.tmp
- @mv $@.tmp $@
-
# Add MBN header to allow SBL3 to start coreboot bootblock
-$(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw
+$(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw.bin
@printf " ADD MBN $(subst $(obj)/,,$(@))\n"
./util/ipqheader/ipqheader.py $(call loadaddr,bootblock) $< $@.tmp
@mv $@.tmp $@
diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc
index cd523b0d56..830ae1eb21 100644
--- a/src/soc/rockchip/rk3288/Makefile.inc
+++ b/src/soc/rockchip/rk3288/Makefile.inc
@@ -75,9 +75,6 @@ ramstage-$(CONFIG_DRIVERS_UART) += uart.c
CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include/
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf "Generating: $(subst $(obj)/,,$(@))\n"
@mkdir -p $(dir $@)
diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc
index 9f49134334..2731f178e8 100644
--- a/src/soc/samsung/exynos5250/Makefile.inc
+++ b/src/soc/samsung/exynos5250/Makefile.inc
@@ -46,9 +46,6 @@ ramstage-y += cbmem.c
CPPFLAGS_common += -Isrc/soc/samsung/exynos5250/include/
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
util/exynos/fixed_cksum.py $< $<.cksum 32768
diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc
index 753e6d0a86..498e8d1a57 100644
--- a/src/soc/samsung/exynos5420/Makefile.inc
+++ b/src/soc/samsung/exynos5420/Makefile.inc
@@ -48,9 +48,6 @@ rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c
CPPFLAGS_common += -Isrc/soc/samsung/exynos5420/include/
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
util/exynos/variable_cksum.py $< $<.cksum
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-28 16:29:13 +0000