diff options
-rw-r--r-- | src/soc/intel/baytrail/iosf.c | 20 | ||||
-rw-r--r-- | src/soc/intel/braswell/iosf.c | 20 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/iosf.c | 20 |
3 files changed, 12 insertions, 48 deletions
diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c index 9e308bcc1e..bb5e80cb82 100644 --- a/src/soc/intel/baytrail/iosf.c +++ b/src/soc/intel/baytrail/iosf.c @@ -13,31 +13,19 @@ * GNU General Public License for more details. */ -#include <device/mmio.h> +#include <stdint.h> #include <device/pci_ops.h> #include <soc/iosf.h> -#if !defined(__PRE_RAM__) -#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12)) - -static inline void write_iosf_reg(int reg, uint32_t value) -{ - write32((u32 *)(IOSF_PCI_BASE + reg), value); -} -static inline uint32_t read_iosf_reg(int reg) -{ - return read32((u32 *)(IOSF_PCI_BASE + reg)); -} -#else static inline void write_iosf_reg(int reg, uint32_t value) { - pci_write_config32(IOSF_PCI_DEV, reg, value); + pci_s_write_config32(IOSF_PCI_DEV, reg, value); } + static inline uint32_t read_iosf_reg(int reg) { - return pci_read_config32(IOSF_PCI_DEV, reg); + return pci_s_read_config32(IOSF_PCI_DEV, reg); } -#endif /* Common sequences for all the port accesses. */ static uint32_t iosf_read_port(uint32_t cr, int reg) diff --git a/src/soc/intel/braswell/iosf.c b/src/soc/intel/braswell/iosf.c index 7b5374a01e..5aa618164c 100644 --- a/src/soc/intel/braswell/iosf.c +++ b/src/soc/intel/braswell/iosf.c @@ -14,32 +14,20 @@ * GNU General Public License for more details. */ -#include <device/mmio.h> +#include <stdint.h> #include <device/pci_ops.h> #include <console/console.h> #include <soc/iosf.h> -#if ENV_RAMSTAGE -#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12)) - static inline void write_iosf_reg(int reg, uint32_t value) { - write32((void *)(IOSF_PCI_BASE + reg), value); -} -static inline uint32_t read_iosf_reg(int reg) -{ - return read32((void *)(IOSF_PCI_BASE + reg)); -} -#else -static inline void write_iosf_reg(int reg, uint32_t value) -{ - pci_write_config32(IOSF_PCI_DEV, reg, value); + pci_s_write_config32(IOSF_PCI_DEV, reg, value); } + static inline uint32_t read_iosf_reg(int reg) { - return pci_read_config32(IOSF_PCI_DEV, reg); + return pci_s_read_config32(IOSF_PCI_DEV, reg); } -#endif /* ENV_RAMSTAGE */ /* Common sequences for all the port accesses. */ static uint32_t iosf_read_port(uint32_t cr, int reg) diff --git a/src/soc/intel/fsp_baytrail/iosf.c b/src/soc/intel/fsp_baytrail/iosf.c index 6308593c77..25f82ababd 100644 --- a/src/soc/intel/fsp_baytrail/iosf.c +++ b/src/soc/intel/fsp_baytrail/iosf.c @@ -15,31 +15,19 @@ * GNU General Public License for more details. */ -#include <device/mmio.h> +#include <stdint.h> #include <device/pci_ops.h> #include <soc/iosf.h> -#if !defined(__PRE_RAM__) -#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12)) - -static inline void write_iosf_reg(int reg, uint32_t value) -{ - write32((u32 *)(IOSF_PCI_BASE + reg), value); -} -static inline uint32_t read_iosf_reg(int reg) -{ - return read32((u32 *)(IOSF_PCI_BASE + reg)); -} -#else static inline void write_iosf_reg(int reg, uint32_t value) { - pci_write_config32(IOSF_PCI_DEV, reg, value); + pci_s_write_config32(IOSF_PCI_DEV, reg, value); } + static inline uint32_t read_iosf_reg(int reg) { - return pci_read_config32(IOSF_PCI_DEV, reg); + return pci_s_read_config32(IOSF_PCI_DEV, reg); } -#endif /* Common sequences for all the port accesses. */ static uint32_t iosf_read_port(uint32_t cr, int reg) |