diff options
| -rw-r--r-- | src/mainboard/google/glados/devicetree.cb | 35 |
1 files changed, 22 insertions, 13 deletions
diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 62d2553aa8..03c46f4005 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -1,7 +1,7 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s3_enable" = "1" + register "deep_s3_enable" = "0" register "deep_s5_enable" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" @@ -44,6 +44,12 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "FspSkipMpInit" = "1" + register "SaGv" = "3" + register "SerialIrqConfigSirqEnable" = "1" + register "PmConfigSlpS3MinAssert" = "2" # 50ms + register "PmConfigSlpS4MinAssert" = "1" # 1s + register "PmConfigSlpSusMinAssert" = "1" # 500ms + register "PmConfigSlpAMinAssert" = "3" # 2s # VR Settings Configuration for 5 Domains #+----------------+-------+-------+-------------+-------------+-------+ @@ -144,20 +150,23 @@ chip soc/intel/skylake register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port 2 # Must leave UART0 enabled or SD/eMMC will not work as PCI - register "SerialIoDevMode" = "{ \ - [PchSerialIoIndexI2C0] = PchSerialIoPci, \ - [PchSerialIoIndexI2C1] = PchSerialIoPci, \ - [PchSerialIoIndexI2C2] = PchSerialIoDisabled, \ - [PchSerialIoIndexI2C3] = PchSerialIoDisabled, \ - [PchSerialIoIndexI2C4] = PchSerialIoPci, \ - [PchSerialIoIndexI2C5] = PchSerialIoDisabled, \ - [PchSerialIoIndexSpi0] = PchSerialIoDisabled, \ - [PchSerialIoIndexSpi1] = PchSerialIoDisabled, \ - [PchSerialIoIndexUart0] = PchSerialIoPci, \ - [PchSerialIoIndexUart1] = PchSerialIoDisabled, \ - [PchSerialIoIndexUart2] = PchSerialIoPci, \ + register "SerialIoDevMode" = "{ + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoPci, + [PchSerialIoIndexI2C2] = PchSerialIoDisabled, + [PchSerialIoIndexI2C3] = PchSerialIoDisabled, + [PchSerialIoIndexI2C4] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, + [PchSerialIoIndexSpi0] = PchSerialIoDisabled, + [PchSerialIoIndexSpi1] = PchSerialIoDisabled, + [PchSerialIoIndexUart0] = PchSerialIoPci, + [PchSerialIoIndexUart1] = PchSerialIoDisabled, + [PchSerialIoIndexUart2] = PchSerialIoPci, }" + # I2C4 is 1.8V + register "SerialIoI2cVoltage[4]" = "1" + device cpu_cluster 0 on device lapic 0 on end end |